Semiconductor Electrode Grain Structure for Wire Bonding

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Solution Overview

Problem

In semiconductor devices like MOSFETs and IGBTs, wire bonding causes stress and thermal hysteresis, leading to deterioration of the gate threshold voltage due to damage such as cracks in the electrode layer, especially when large currents are involved, and existing methods fail to adequately suppress this damage.

Innovation Solution

A semiconductor device with a metallic film on its surface where the grain particle diameters are equal to or greater than the film thickness, and a wire bonding method that ensures the hardness ratio of the electrode layer to the wire is 70% or more, effectively preventing damage and ion intrusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a thick wire is used for bonding to handle large currents, then the current carrying capacity is improved, but the stress and damage to the electrode layer increases

Engineering Contradiction:
Improvecurrent carrying capacityVSAvoidelectrode layer integrity
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

The invention changes the physical and chemical parameters of the electrode layer by controlling grain size to be equal to or larger than film thickness, and adjusting hardness ratio to 70% or more relative to the wire. This parameter optimization allows the electrode layer to withstand the stress from thick bonding wires while maintaining current carrying capacity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention creates a composite structure within the electrode layer by forming a multi-grain metallic film with specific grain size distribution and hardness characteristics. This composite microstructure provides both the mechanical strength needed to support thick wires and the electrical conductivity required for large current flows

Inventive Principle:
Principle #40Composite materials

2Strength

If the wire bonding process is performed with high ultrasonic power, then the bonding strength is improved, but cracks occur in the electrode layer

Engineering Contradiction:
Improvebonding strengthVSAvoidelectrode layer cracks
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The invention prepares the electrode layer in advance by forming a metallic film with optimized grain size (equal to or larger than film thickness) and hardness ratio (70% or more). This pre-conditioning of the electrode layer creates a cushioning effect that absorbs the mechanical stress from high-power ultrasonic bonding, preventing crack formation while maintaining bonding strength

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Strength

If the grain size of the metallic film is increased, then the resistance to wire bonding damage is improved, but the manufacturing precision of the film thickness control becomes more difficult

Engineering Contradiction:
Improveresistance to wire bonding damageVSAvoidfilm thickness control
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The invention establishes a specific parameter relationship where grain size is controlled to be equal to or larger than film thickness, and hardness ratio is maintained at 70% or more. This parameter specification provides clear manufacturing targets that balance the need for damage resistance with the feasibility of thickness control during deposition processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses the deterioration of the gate threshold voltage by minimizing damage during wire bonding and preventing ion intrusion, ensuring reliable semiconductor performance even with large current flows.

Implementation Method 1

the metallic film has a plurality of grains, particle diameters of the grains being substantially equal to or more than a thickness of the metallic film

Methodology Applied
Scientific EffectGrain boundary strengthening: Grain Boundary Strengthening

Implementation Method 2

a damage such as a crack sometimes occurs in the electrode layer owing to power of ultrasonic waves

Methodology Applied
Scientific EffectUltrasonic vibration: Ultrasonic Vibration

Data Source

PatentUS9741805B2Semiconductor device and method for manufacturing the semiconductor device
Publication Date: 2017.08.22 FUJI ELECTRIC CO LTD
  • US9741805B2 patent drawing
  • US9741805B2 patent drawing
  • US9741805B2 patent drawing

AI summary

A deterioration of a gate threshold voltage, which is caused by a stress and a thermal hysteresis when wire bonding for a surface of an electrode layer of a semiconductor device is performed, can be suppressed. The semiconductor device includes a metallic film provided at a surface of a semiconductor chip, and a wire bonded to an upper surface of the metallic film. The metallic film has a plurality of grains, particle diameters of the grains are substantially equal to or more than a thickness of the metallic film.