Substrateless Semiconductor Electrolytic Carrier Thermal Coupling

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Solution Overview

Problem

Existing optoelectronic semiconductor components face challenges in achieving improved thermal properties, particularly in designs that lack a substrate, which restricts thermal coupling and scalability.

Innovation Solution

A substrateless optoelectronic semiconductor component with a metallic carrier deposited electrolytically or electrolessly on the underside, projecting beyond the chip in lateral directions, allowing for scalable and improved thermal coupling by breaking the geometric dependence between the chip and carrier.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a substrateless design is used to reduce complexity and improve integration, then device complexity is reduced and scalability is improved, but thermal coupling is restricted and heat dissipation is worsened

Engineering Contradiction:

Improvestructure complexityVSAvoidthermal coupling

Core Design Contradiction:

Device complexityVSTemperature

Solution Approach 1:

The patent transitions from planar 2D mounting to 3D vertical integration by depositing the metallic carrier on the underside of the chip and having it project laterally. This dimensional change enables thermal coupling through the thickness direction while maintaining scalability in the lateral direction, resolving the contradiction between simplified substrateless design and thermal management requirements.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The metallic carrier serves as an intermediary element between the optoelectronic chip and the mounting surface. It provides dual functionality: electrical connection through direct contact with the chip underside and thermal conduction through its lateral extension that projects beyond the chip edges, enabling heat dissipation without requiring a traditional substrate.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Manufacturing precision

If the metallic carrier is deposited electrolytically or electrolessly, then manufacturing precision and integration are improved, but additional manufacturing steps are required

Engineering Contradiction:

Improvecarrier deposition precisionVSAvoidmanufacturing process complexity

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces traditional mechanical attachment methods (soldering, bonding) with electrochemical deposition processes. The metallic carrier is deposited electrolytically or electrolessly directly onto the chip underside, eliminating the need for separate mechanical fastening steps and achieving precise integration through controlled deposition thickness and adhesion.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Temperature

If the metallic carrier projects beyond the chip in lateral directions, then thermal coupling and heat dissipation are improved, but device footprint is increased

Engineering Contradiction:

Improveheat dissipationVSAvoidcarrier footprint

Core Design Contradiction:

TemperatureVSArea of stationary object

Solution Approach 1:

The metallic carrier exhibits local quality differentiation: under the chip it provides electrical connection with minimal footprint, while lateral projections extend beyond chip edges to provide thermal conduction paths. This localized functional differentiation enables heat dissipation without proportionally increasing the overall device footprint, as the thermal pathways extend laterally from the chip perimeter rather than requiring uniform expansion.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances thermal coupling and scalability, enabling efficient heat dissipation and improved performance in high-thermal-loading applications.

Implementation Method 1

the metallic carrier is deposited electrolytically or in an electroless fashion at the second main face of the optoelectronic semiconductor chip

Methodology Applied

Scientific EffectElectrolytic deposition: Electrodeposition

Implementation Method 2

the metallic carrier is deposited electrolytically or in an electroless fashion at the second main face of the optoelectronic semiconductor chip

Methodology Applied

Scientific EffectElectroless deposition: Electrodeposition

Implementation Method 3

This configuration enhances thermal coupling and scalability, enabling efficient heat dissipation

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9041020B2Electrolytically coated optoelectronic semiconductor component and method for producing an optoelectronic semiconductor component

Publication Date: 2015.05.26 OSRAM OLED

AI summary

The invention relates to an optoelectronic semiconductor component, comprising a substrate-free optoelectronic semiconductor chip (1), which has a first main surface (1a) on an upper face and a second main surface (1b) on a lower face, and a metal carrier (2), which is arranged on the lower face of the optoelectronic semiconductor chip (1), wherein the metal carrier (2) protrudes over the optoelectronic semiconductor chip (1) in at least one lateral direction (1) and the metal carrier (2) is deposited on the second main surface (1b) of the optoelectronic semiconductor chip (1) using a galvanic or electroless plating method.