Semiconductor Device with Embedded Region for Breakdown Voltage
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Solution Overview
Problem
The existing semiconductor device structure struggles to achieve high breakdown voltage due to the concentration of electric fields near the end of the groove portion, which affects the device's performance and reliability.
Innovation Solution
The semiconductor device incorporates a groove portion with a gate electrode embedded only within it, and the bottom of the groove portion extends into an embedded region of opposite conductivity type, preventing electric field concentration and enhancing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a groove portion is formed on the surface of the semiconductor layer to increase channel area, then the ON resistance is reduced, but the breakdown voltage decreases due to electric field concentration at the groove end
Solution Approach 1:
The patent applies local quality by creating an embedded region with opposite conductivity type specifically at the groove portion end, where the electric field concentration problem occurs. This localized modification changes the electrical properties only in the critical area without affecting the overall device structure. The embedded region acts as a field plate that distributes the electric field, preventing concentration at the groove end while maintaining the low ON resistance benefits of the groove structure.
Solution Approach 2:
The embedded region with opposite conductivity type serves as an intermediary element between the groove portion and the substrate. It mediates the electric field distribution by providing a transition zone that prevents direct field concentration at the groove end. This intermediary structure allows the groove to maintain its channel-enhancing function while eliminating its harmful electric field concentration effect.
2Reliability
If the groove portion is extended deeper to further reduce ON resistance, then the channel area increases, but the device area and complexity increase
Solution Approach 1:
The patent utilizes the vertical dimension by forming the embedded region deeper in the substrate below the groove portion. Instead of extending the groove laterally or increasing its surface area, the solution moves to the depth dimension. The embedded region extends vertically to provide field distribution without increasing the planar device footprint, thus reducing ON resistance through increased channel area while maintaining compact device area.
Data Source
AI summary
The present invention provides a semiconductor device designed to prevent an electric field from being concentrated in the vicinity of a groove portion. The semiconductor includes a semiconductor layer, a source region, a drain region, a source offset region, a drain offset region, a groove portion, a gate insulating film, a gate electrode, and an embedded region. The groove portion is provided in at least a position between the source offset region and the drain offset region in the semiconductor layer in a plan view, in a direction from the source offset region to the drain offset region in a plan view. The gate insulating film covers a side and a bottom of the groove portion. The gate electrode is provided only within the groove portion in a plan view, and contacts the gate insulating film.


