Semiconductor Light-Emitting Element Layout for Heat Dissipation
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Solution Overview
Problem
Conventional semiconductor light-emitting elements experience reduced reliability due to low heat dissipation, particularly when high current is supplied, as heat generated near the light-emitting layer is inefficiently dissipated through insulating films with low thermal conductivity.
Innovation Solution
The semiconductor light-emitting element incorporates a semiconductor stack with an n-type layer, light-emitting layer, and p-type layer, featuring n exposure portions and a heat dissipation path that bypasses the insulating layer by positioning conductive connecting members above the n-type layer's inner lateral surfaces, enhancing thermal conductivity and dispersing mounting loads to prevent cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heat is dissipated through the insulating film, then the insulating film provides electrical insulation, but the thermal conductivity is low resulting in poor heat dissipation
Solution Approach 1:
The patent divides the heat dissipation path into multiple segments: heat generated in the light-emitting layer is conducted through the n-type layer to the n wiring electrode layer, then through the first n connecting member to the mounting board. This segmentation allows heat to bypass the insulating film's thermal resistance by utilizing the high thermal conductivity of the n-type layer and connecting members, while the insulating film maintains its electrical insulation function.
Solution Approach 2:
The n-type layer serves as an intermediary heat conduction path between the light-emitting layer and the n wiring electrode layer. The first n connecting member acts as an intermediary between the n wiring electrode layer and the mounting board. These intermediaries provide high thermal conductivity pathways that bypass the insulating film's thermal resistance, effectively solving the heat dissipation problem while maintaining electrical insulation.
2Reliability
If bumps are disposed in high density to dissipate heat, then heat dissipation capacity increases, but mounting stress concentrates causing cracks in the insulating film
Solution Approach 1:
The patent applies local quality by positioning the first n connecting member specifically at the n exposure portion where the n-type layer is exposed, rather than distributing connecting members uniformly. This localized positioning allows heat dissipation to occur at the specific heat generation point while the insulating film covers and protects other areas, reducing overall mounting stress concentration and preventing cracks.
Solution Approach 2:
The patent transitions from a two-dimensional planar heat dissipation approach to a three-dimensional vertical heat dissipation path. Heat is conducted vertically through the n-type layer and first n connecting member to the mounting board, bypassing the insulating film layer. This dimensional change allows high-density bump arrangement for heat dissipation without concentrating stress on the insulating film, as the heat path is routed through the vertical stacking structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly improves heat dissipation and reduces the risk of cracks in the insulating layer, maintaining reliability even under high current conditions by creating direct heat dissipation paths and dispersing mounting forces effectively.
Implementation Method 1
heat generated in the vicinity of the light-emitting layer is dissipated to the mounting board via the bumps. The generated heat is conducted to the bumps via the insulating film having low thermal conductivity
Implementation Method 2
a semiconductor stack including an n-type layer, a light-emitting layer above the n-type layer, and a p-type layer above the light-emitting layer
Data Source
AI summary
A semiconductor light-emitting element includes: a semiconductor stack including an n-type layer and a p-type layer and having at least one n exposure portion being a recess where the n-type layer is exposed; a p wiring electrode layer on the p-type layer; an insulating layer (i) continuously covering inner lateral surfaces of at least one n exposure portion and part of a top surface of the p wiring electrode layer and (ii) having an opening portion that exposes the n-type layer; an n wiring electrode layer disposed above the p-type layer and the p wiring electrode layer and in contact with the n-type layer in the opening portion; and at least one first n connecting member connected to the n wiring electrode layer in at least one first n terminal region. The n wiring electrode layer and the p-type layer are disposed below at least one first n terminal region.