Semiconductor Emitter Region Curved Boundary Latch-Up

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Solution Overview

Problem

Conventional semiconductor devices with increased emitter region width for channel formation lead to larger voltage drops and latch-up issues due to increased hole movement in the base region.

Innovation Solution

A semiconductor device design featuring a semiconductor substrate with trench portions, an emitter region, and a contact region, where the emitter region's central length is shorter than its length at trench contacts, and the contact region's depth decreases away from trench portions, with a curved emitter region boundary and separated contact regions, to reduce hole concentration and voltage drop.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the width of the emitter region is increased to reserve channel formation region, then the channel formation area is improved, but the voltage drop in the base region increases and latch-up occurs more easily

Engineering Contradiction:
Improveemitter region areaVSAvoidlatch-up resistance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The emitter region is designed with non-uniform width: wider at the ends (near trench portions) to ensure channel formation, and narrower at the central position to reduce hole movement distance and voltage drop in the base region. This local variation in dimensions resolves the contradiction between maintaining channel area and preventing latch-up.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact region is extended in the depth direction (vertical dimension) with gradually decreasing depth from trench portions toward the center. This vertical extension compensates for the reduced horizontal width at the center, maintaining effective contact area while allowing the emitter region to be narrower and reducing latch-up risk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the emitter region width is increased to ensure channel formation, then the channel formation capability is improved, but the hole movement distance in the base region increases causing larger voltage drop

Engineering Contradiction:
Improvechannel formationVSAvoidvoltage drop
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The emitter region width is locally optimized: wider at ends for channel formation, narrower at center for reduced voltage drop. This spatially varying geometry simultaneously achieves both objectives.

Inventive Principle:
Principle #3Local quality

3Area of stationary object

If the emitter region is made wider for channel formation, then the channel area is improved, but the device complexity increases due to curved boundaries and varied dimensions

Engineering Contradiction:
Improveemitter region areaVSAvoidemitter region structure
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The emitter region boundary is designed with curved shapes rather than straight lines, creating a smooth transition between wide and narrow sections. This curved geometry achieves the required non-uniform width distribution while being manufacturable and avoiding excessive complexity.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS10256229B2Semiconductor device and manufacturing method
Publication Date: 2019.04.09 FUJI ELECTRIC CO LTD
  • US10256229B2 patent drawing
  • US10256229B2 patent drawing
  • US10256229B2 patent drawing

AI summary

It is aimed to realize both of reserving a channel formation region and suppressing a latch-up. A semiconductor device is provided, including: a semiconductor substrate; a plurality of trench portions provided at a front surface side of the semiconductor substrate, each of which has a portion extending in an extending direction; and a first conductivity-type emitter region and a second conductivity-type contact region provided between adjacent two trench portions and exposed on a front surface of the semiconductor substrate alternately in the extending direction, wherein on the front surface of the semiconductor substrate, a length of the emitter region at a central position between the two trench portions is shorter than a length of the emitter region at portions contacting the trench portions, and on the front surface of the semiconductor substrate, at least a part of a boundary of the emitter region has a curved shape.