Semiconductor Device With Etch-Selective Insulating Layers
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Solution Overview
Problem
The challenge is to enhance the integration density of semiconductor devices, which is crucial for improving the price competitiveness of electronic products, and existing two-dimensional semiconductor devices are not sufficient in this regard.
Innovation Solution
A semiconductor device with a stack structure that includes interlayer insulating layers and gate layers alternately stacked, featuring a lower insulating layer, an intermediate insulating layer with etch selectivity, and an upper insulating layer, where the intermediate layer contains a group-5 element dopant, allowing for improved etch selectivity and vertical structure penetration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional memory cell arrangement is used, then device structure is simple, but integration density is low
Solution Approach 1:
The patent transitions from two-dimensional memory cell arrangement to three-dimensional stack structure, where multiple memory cells are stacked vertically along the vertical direction. This dimensional change enables higher integration density by utilizing the vertical space above each contact plug, allowing multiple bit lines and word lines to be formed in different vertical levels while maintaining a compact footprint.
2Manufacturing precision
If multiple insulating layers are stacked, then etch selectivity is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent employs different insulating materials with distinct etch selectivity characteristics for different functional layers. The first insulating layer uses a material with first etch selectivity, while the second insulating layer uses a material with second etch selectivity that differs from the first. This local differentiation of material properties enables selective etching processes to access specific layers without affecting others, facilitating precise manufacturing despite the multi-layer complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases integration density by enabling efficient stacking and vertical structure penetration, thereby enhancing the performance and competitiveness of semiconductor devices.
Implementation Method 1
the intermediate insulating layer exhibits etch selectivity
Implementation Method 2
the intermediate insulating layer comprises a dopant, wherein the dopant includes a group-5 element of the periodic table
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a stack structure disposed on a lower structure; an insulating structure disposed on the stack structure; and a vertical structure extending in a direction perpendicular to an upper surface of the lower structure and having side surfaces opposing the stack structure and the insulating structure. The stack structure includes interlayer insulating layers and gate layers, alternately stacked, and the insulating structure includes a lower insulating layer, an intermediate insulating layer on the lower insulating layer, and an upper insulating layer on the intermediate insulating layer.