Semiconductor Double Patterning Filler Layer CD Bias Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor device fabrication is controlling the critical dimension (CD) bias between double patterning steps, which affects device performance due to the difficulty in maintaining consistent opening sizes during the pattern decomposition process in photolithography.
Innovation Solution
A method is introduced where a filler layer is formed in the first opening after the first patterning process, using a material and etching process similar to those of the second patterning step, ensuring a consistent topography and minimizing CD bias by forming a second opening substantially equal to the first opening.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the 2P2E (photo-etch-photo-etch) approach utilizing two photolithography steps and two etching steps is implemented, then the pitch constraint is met, but the critical dimension (CD) bias between the double patterning steps deteriorates
Solution Approach 1:
A filler layer is introduced as an intermediary between the first and second patterning steps. This filler layer fills the first openings and provides a uniform topography for the second photolithography step, acting as a mediator that decouples the two patterning processes and eliminates CD bias accumulation.
Solution Approach 2:
The filler layer is formed in advance before the second patterning step. By performing the filling action preliminarily, the topography is stabilized before the second exposure, ensuring that the second pattern is formed on a uniform surface regardless of variations in the first pattern dimensions.
2Productivity
If the target pattern is decomposed into two patterns respectively defined on two photomasks, then the pitch constraint is satisfied, but the device performance deteriorates due to CD bias control difficulty
Solution Approach 1:
The filler layer serves as an intermediary structure that separates the two patterning steps. It ensures that the second patterning step operates independently on a uniform surface, preventing CD bias from affecting device performance while maintaining high integration through pattern decomposition.
3Device complexity
If no filler layer is formed between double patterning steps, then the process is simpler, but the topography becomes inconsistent affecting the second patterning step
Solution Approach 1:
The filler layer is formed as a preliminary step to establish a uniform topography before the second patterning. This preliminary action ensures that subsequent processing occurs on a stable, flat surface, improving topography consistency despite the additional process step.
Data Source
AI summary
A method of forming a semiconductor device is provided. A material layer, a first flowing material layer and a first mask layer are sequentially formed on a substrate. A first etching process is performed by using the first mask layer as a mask, so as to form a first opening in the material layer. The first mask layer and the first flowing material layer are removed. A filler layer is formed in the first opening. A second flowing material layer is formed on the material layer and the filler layer. A second mask layer is formed on the second flowing material layer. A second etching process is performed by using the second mask layer as a mask, so as to form a second opening in the material layer.