Semiconductor Fin Patterning via Ion Implantation and Plasma Treatment
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Solution Overview
Problem
As semiconductor devices miniaturize, achieving uniformity in pattern widths and reducing line edge roughness (LER) becomes crucial for reliability, as existing methods struggle to effectively manage LER during photolithography, leading to potential short circuits and performance issues.
Innovation Solution
A method involving the formation of a composite film, where a rough pattern is created and then smoothed through ion implantation and plasma treatment, using ions like C, Ar, H2, and O2, and HBr or He plasma, to enhance line edge roughness, which is then used as a mask for patterning the composite film and substrate to form fin-type patterns with improved LER.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If photolithography is used for pattern formation, then manufacturing capability is provided, but line edge roughness increases leading to reliability issues
Solution Approach 1:
The patent applies preliminary action by performing ion implantation and plasma treatment on the pattern before final patterning. The rough pattern is pre-formed and then smoothed through ion implantation (introducing ions like C, Ar, H2, O2) and plasma treatment (using HBr or He plasma), which modifies the pattern edges in advance to reduce line edge roughness before the pattern is used as a mask for subsequent patterning steps.
2Manufacturing precision
If pattern width uniformity is improved, then manufacturing precision increases, but process complexity increases
Solution Approach 1:
The patent applies parameter changes by modifying the physical and chemical parameters of the pattern through ion implantation and plasma treatment. By changing parameters such as ion type, ion energy, plasma composition, and treatment conditions, the pattern edge quality is improved to achieve better width uniformity. This allows conventional photolithography to achieve results previously requiring complex multi-step patterning processes.
3Reliability
If line edge roughness is reduced, then reliability improves, but additional processing steps are required
Solution Approach 1:
The patent merges multiple functions into a integrated process flow. The ion implantation and plasma treatment steps are combined with the patterning process, and the smoothed pattern is then used as a mask for subsequent patterning steps. This integration allows the line edge roughness reduction to be achieved within the existing fabrication workflow without requiring completely separate additional processing stages, thereby maintaining productivity while improving reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly enhances the line edge roughness of patterns, improving the reliability and performance of semiconductor devices by reducing the risk of short circuits and ensuring uniformity in micro-pattern formation, especially in double and quadruple patterning technologies.
Implementation Method 1
forming a smooth pattern by subjecting the rough pattern to ion implantation and plasma treatment
Implementation Method 2
forming a smooth pattern by subjecting the rough pattern to ion implantation and plasma treatment
Data Source
AI summary
Methods for fabricating a semiconductor device include forming a composite film, forming a rough pattern on the composite film, forming a smooth pattern by subjecting the rough pattern to ion implantation and a plasma treatment, and patterning the composite film using the smooth pattern as a first mask.