Semiconductor Fuse Driver Test Global Line Monitoring

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor memory apparatuses are inefficiently discarded when only some unit cells fail, as existing repair methods, such as using anti-fuse technology, degrade precision by not directly monitoring fuse information and require stacking all chips for testing.

Innovation Solution

A semiconductor apparatus with a fuse driver that outputs fuse information through a test global line during a test mode, allowing for direct monitoring of fuse programming without needing to stack all slave chips, using a decoder to generate a fuse select signal and a fuse block to output fuse information based on the signal, enabling separate testing of fuses without affecting normal operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If fuse information is monitored through data from memory cell block, then repair operation can be performed, but measurement precision is degraded

Engineering Contradiction:
Improvefuse information monitoring precisionVSAvoidmonitoring system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the fuse information monitoring function from the memory cell block data path and creates a separate dedicated output path. The fuse block now has its own independent output that directly provides fuse information to the I/O driver, separating the monitoring function from the data storage function to achieve precise monitoring without affecting memory operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a dedicated signal path acting as an intermediary between the fuse block and the I/O driver. This separate path allows fuse information to be transmitted directly without going through the memory cell block, enabling accurate monitoring while maintaining independence from the memory data path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If all slave chips are stacked for testing, then fuse programming can be monitored, but productivity is reduced

Engineering Contradiction:
Improvefuse programming verificationVSAvoidtesting efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the testing process by enabling independent testing of the fuse block from the memory cell blocks. The fuse block can now be tested separately through its dedicated output path, allowing manufacturers to verify fuse programming without requiring complete chip stacking, thus improving testing efficiency and productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables preliminary verification of fuse programming through the dedicated output path before final chip assembly. This allows fuse information to be monitored and verified in advance, reducing the need for complete stacking and retesting, thereby improving overall manufacturing productivity.

Inventive Principle:
Principle #10Preliminary action

3Ease of repair

If anti-fuse is used for repair operation, then failed cells can be replaced, but manufacturing precision is degraded

Engineering Contradiction:
Improvecell replacement capabilityVSAvoidfuse programming precision
Core Design Contradiction:
Ease of repairVSManufacturing precision

Solution Approach 1:

The patent implements a feedback mechanism where fuse information is directly output from the fuse block and can be monitored through the I/O driver. This allows real-time verification of fuse programming status, providing feedback on whether programming was successful, thereby improving manufacturing precision while maintaining repair capabilities.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8873313B2Semiconductor apparatus
Publication Date: 2014.10.28 SK HYNIX INC
  • US8873313B2 patent drawing
  • US8873313B2 patent drawing
  • US8873313B2 patent drawing

AI summary

A semiconductor apparatus includes: a memory cell block configured to store data; a fuse block including a plurality of fuses configured to store fuse information; an I/O driver configured to output the data transmitted through a global line to a pad; and a fuse driver configured to output the fuse information transmitted through a test global line to the pad during a test mode.