Semiconductor Integrated Circuit Fuse Trimming for Optical Sensor Quality
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in reducing the number of melted-and-cut fuses during the trimming process, which can damage the semiconductor and affect the quality of optical sensors, particularly in manufacturing variations within the range of {mean value±2×(standard deviation)} in appearance frequency distributions.
Innovation Solution
The semiconductor integrated circuit incorporates a trimming information generation circuit and a conversion circuit to minimize the number of melted-and-cut fuses by assigning trimming information that represents the least possible number of fuses for mean value conditions and the second least number for {mean value±2×(standard deviation)} ranges, using a bit string conversion to select elements for correcting circuit constants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of fuses to be melted and cut is reduced, then the damage to the semiconductor integrated circuit is minimized, but the ability to correct manufacturing variations is compromised
Solution Approach 1:
The patent pre-calculates and stores optimal fuse melting patterns in a lookup table during design phase. During manufacturing, the actual characteristic values are measured and used to index into this pre-prepared table, which directly provides the optimal fuse melting configuration. This eliminates the need for complex real-time optimization algorithms and ensures the minimal number of fuses are melted while achieving the required correction, thus resolving the contradiction between minimizing damage and maintaining correction capability.
Solution Approach 2:
The patent implements a dynamic trimming process where the selection of which fuses to melt is adaptively determined based on the actual measured characteristic values of each device. The system dynamically adjusts the trimming strategy by using the measured values to select the most appropriate pre-calculated fuse pattern from the lookup table, ensuring optimal correction with minimal fuse melting for each specific device condition.
2Manufacturing precision
If more fuses are melted and cut to achieve better correction, then the manufacturing variations are reduced, but the semiconductor integrated circuit suffers more damage
Solution Approach 1:
The patent pre-calculates optimal fuse melting patterns for various characteristic value conditions and stores them in a lookup table during the design phase. Each entry in the table represents a pre-optimized solution that achieves the necessary correction with the minimal number of fuses melted. During manufacturing, the system simply queries this pre-prepared table based on measured values, ensuring optimal correction while minimizing damage without requiring complex real-time decision-making.
Solution Approach 2:
The patent changes the approach from dynamic real-time optimization to static pre-computed optimization. By transforming the trimming problem into a lookup operation based on characteristic value parameters, the system achieves efficient correction with minimal fuse melting. The pre-calculated lookup table contains optimized solutions for various parameter conditions, allowing the system to select the appropriate correction strategy without attempting to melt more fuses than necessary.
3Reliability
If a complex trimming circuit is used to minimize fuse melting, then the number of melted fuses is reduced, but the circuit complexity increases
Solution Approach 1:
The patent introduces a lookup table as an intermediary data structure that mediates between the measured characteristic values and the fuse melting control signals. Instead of implementing complex real-time optimization algorithms, the system uses this pre-computed lookup table to translate measured values into optimal fuse melting patterns. This intermediary approach significantly reduces circuit complexity while maintaining the ability to minimize fuse melting, as the complex optimization logic is transferred to the design-phase table generation rather than runtime circuit operation.
4Manufacturing precision
If the trimming process uses more fuses to ensure coverage of all variation ranges, then the correction accuracy is improved, but the productivity decreases due to increased processing time
Solution Approach 1:
The patent performs the complex optimization calculation in advance during the design phase and stores the results in a lookup table. During actual manufacturing, the trimming process simply involves measuring the characteristic values and querying the pre-prepared table, which provides the optimal fuse melting pattern immediately. This pre-computation approach dramatically reduces the trimming processing time while maintaining high correction accuracy, as the system no longer needs to perform iterative optimization during the time-critical manufacturing process.
Solution Approach 2:
The patent implements a dynamic query-based trimming approach where the specific fuse melting pattern is determined adaptively based on the measured characteristic values. The system dynamically selects the appropriate pre-calculated pattern from the lookup table using the measured values as indices, ensuring accurate correction for each specific device while maintaining fast processing speeds. This dynamic selection from pre-computed options achieves both high accuracy and productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of melted-and-cut fuses, thereby minimizing damage and adverse effects on the semiconductor integrated circuit quality, while also reducing variations in light-reception sensitivity and light-emission intensity characteristics in optical sensors.
Implementation Method 1
programming (writing) onto the individual fuse elements F1-F6 is achieved by applying a specified program voltage to a terminal pad P. That is, fuse elements to which the program voltage is applied from the terminal pad P are melted and cut to go OFF state
Data Source
AI summary
A resistor array is provided in an element array. A mean value of a characteristic-value distribution is associated with a median of combined resistance values obtained by the element array. An array of trimming information pieces corresponding to combined resistance values larger than the median is set in a descending order of ‘15’ to ‘8’ in decimal number, and an array of trimming information pieces corresponding to combined resistance values less than the median is set in an ascending order of ‘0’ to ‘7’ in decimal number. A circuit converts trimming information derived from the trimming information generation circuit to generate element selection information for selecting turn-off resistors to obtain combined resistance values from the resistor array. Thus, the number of melted-and-cut fuses involved in generation of trimming information associated within the range of “mean value±2σ” in the distribution is reduced.


