Semiconductor Gate Electrode Formation via Anisotropic Etching
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Solution Overview
Problem
The manufacturing method of semiconductor devices with a self-aligned STI structure faces issues with short-circuiting between neighboring memory gate lines, which affects the reliability and yield of nonvolatile memory devices.
Innovation Solution
A method involving the formation of a gate dielectric film and polysilicon layers, followed by the creation of an isolation trench and element isolation film, with a polishing process to form a gate electrode using anisotropic dry etching, ensuring the upper surface of the element isolation film is properly aligned to prevent short-circuiting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a self-aligned STI structure is used to improve manufacturing precision, then short-circuiting between gate lines occurs reducing reliability
Solution Approach 1:
The element isolation film is formed to protrude above the gate dielectric film surface before gate electrode formation. This preliminary action creates a physical barrier that prevents short-circuiting between adjacent gate lines during subsequent processing steps, while maintaining the self-aligned STI structure's manufacturing precision benefits.
Solution Approach 2:
The element isolation film is selectively formed only in regions where short-circuit prevention is needed, with its upper surface protruding above the gate dielectric film. This localized structure provides targeted protection without affecting other areas of the device, resolving the contradiction between maintaining alignment precision and preventing short-circuits.
2Ease of manufacture
If the element isolation film upper surface is aligned with the gate dielectric film surface, then manufacturing is simpler, but short-circuiting occurs between adjacent memory gate lines
Solution Approach 1:
The element isolation film is formed with its upper surface protruding above the gate dielectric film surface before gate electrode formation. This preliminary action creates a physical barrier that prevents short-circuiting between adjacent gate lines during subsequent processing steps, while maintaining the self-aligned STI structure's manufacturing precision benefits.
Solution Approach 2:
The element isolation film is selectively formed only in regions where short-circuit prevention is needed, with its upper surface protruding above the gate dielectric film. This localized structure provides targeted protection without affecting other areas of the device, resolving the contradiction between maintaining alignment precision and preventing short-circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by preventing short-circuiting between adjacent memory gate lines, improving the integration density and reliability of nonvolatile memory devices.
Implementation Method 1
forming a gate electrode using an anisotropic dry etching method
Implementation Method 2
performing a polishing process to a dielectric film
Data Source
AI summary
The manufacturing method of the semiconductor device includes a step of forming the gate dielectric film GI2 and the polysilicon layer PS2 on the main surface SUBa of the semiconductor substrate SUB, a step of forming the isolation trench TR in the semiconductor substrate SUB through the polysilicon layer PS2 and the gate dielectric film GI2, a step of filling the isolation trench TR with the dielectric film, and then a step of polishing the dielectric film to form the element isolation film STI in the isolation trench TR. Further, a method for manufacturing a semiconductor device comprises etching the element isolation film STI to retract the upper surface STIa of the element isolation film STI, then further depositing a polysilicon layer on the polysilicon layer PS2 to form a gate electrode using an anisotropic dry etching method.