Semiconductor Gate End Curvature for Short-Circuit Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices shrink, the distance between gate pattern structures decreases, leading to potential device failures due to convex rounding of end portions and increased risk of short circuits, as well as patterning defects where gate pattern structures fail to separate properly.

Innovation Solution

The design incorporates concavely curved end portions of gate pattern structures and gate isolation regions in a rounded hole configuration to maintain separation and prevent short circuits, while ensuring minimal distance between side surfaces of the gate pattern structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the distance between gate pattern structures is decreased to increase storage capacity, then data storage density is improved, but the risk of short circuits and patterning defects increases

Engineering Contradiction:
Improvedata storage capacityVSAvoiddevice reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The end portions of the gate pattern structures are formed with a concave curved shape instead of a straight or convex configuration. This curvature creates a rounded hole configuration that maintains adequate separation distance between adjacent gate structures, preventing short circuits while allowing closer spacing to increase storage capacity.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The gate pattern structure has different geometries at different locations: the central portion maintains a standard configuration for optimal electrical performance, while the end portions are specifically modified with concave curvature to prevent short circuits. This local differentiation allows the structure to simultaneously achieve high density and high reliability.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If the gate pattern structures are placed closer together, then area utilization is improved, but patterning defects occur where structures fail to separate

Engineering Contradiction:
Improvearea utilizationVSAvoidpatterning precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The concave curved end portions create a rounded hole configuration that facilitates proper separation of adjacent gate structures during the patterning process. The curved geometry prevents the structures from merging or failing to separate, ensuring manufacturing precision even at high area utilization.

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Ease of manufacture

If convex rounded end portions are used in gate pattern structures, then manufacturing is simplified, but short circuits occur between adjacent structures

Engineering Contradiction:
Improvemanufacturing easeVSAvoidelectrical isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Instead of using convex rounded end portions that protrude toward adjacent structures and cause short circuits, the invention inverts the curvature to create concave end portions that recede from adjacent structures. This inversion maintains manufacturing simplicity while ensuring adequate electrical isolation and preventing short circuits.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS20250359047A1Semiconductor device and data storage system including the same
Publication Date: 2025.11.20 SAMSUNG ELECTRONICS CO LTD
  • US20250359047A1 patent drawing
  • US20250359047A1 patent drawing
  • US20250359047A1 patent drawing

AI summary

A semiconductor device and a data storage system, the device including a lower structure; and an upper structure on the lower structure and including a memory cell array, wherein the lower structure includes a semiconductor substrate, first and second active regions spaced apart from each other in a first direction on the semiconductor substrate, the first and second active regions being defined by an isolation insulating layer on the semiconductor substrate, and first and second gate pattern structures extending in the first direction to cross the first and second active regions, respectively, on the semiconductor substrate, the first gate pattern structure and the second gate pattern structure have first and second end portions spaced apart from each other in a facing manner in the first direction, respectively, and the first and second end portions are concavely curved in opposite directions away from each other in a plan view.