Power Semiconductor Gate Insulating Film Reliability
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Solution Overview
Problem
In power semiconductor devices, high-speed switching leads to a sudden increase in drain voltage, generating displacement currents that can cause dielectric breakdown between the gate and source electrodes due to high electric fields, compromising reliability.
Innovation Solution
The design incorporates a semiconductor substrate with a drift layer, well regions, and insulating films of varying thicknesses to manage displacement currents, ensuring that most of the current flows through thicker field insulating films, reducing the electric field intensity on the gate insulating film.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the MOSFET is switched at high speed, then the switching performance is improved, but the displacement current generates high electric field that causes dielectric breakdown of the gate insulating film
Solution Approach 1:
A field plate structure is introduced as an intermediary element between the gate electrode and the P well. The field plate is connected to the gate electrode and extends over the P well region, acting as a mediator to distribute and reduce the electric field intensity during high-speed switching, thereby preventing dielectric breakdown of the gate insulating film while maintaining high switching performance
Solution Approach 2:
The invention changes the electrical parameters by introducing a field plate with specific capacitance characteristics. The field plate structure modifies the electric field distribution parameters during switching transitions, reducing the peak electric field intensity applied to the gate insulating film while preserving the high-speed switching capability of the MOSFET
2Reliability
If the P well area under the gate pad is made large, then the diode function is improved, but the resistance of the P well increases causing high voltage generation during displacement current flow
Solution Approach 1:
The field plate serves as an intermediary conductive structure that provides a low-resistance path for displacement current. By extending the field plate over the P well region and connecting it to the gate electrode, it mediates the current flow and reduces the voltage drop across the P well, thereby reducing the stress on the gate insulating film while maintaining the large P well area needed for parasitic transistor suppression
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses dielectric breakdown and enhances the reliability of power semiconductor devices during high-speed switching by reducing the electric field applied to the gate insulating film, maintaining its integrity.
Implementation Method 1
a voltage which cannot be disregarded is generated in the P well because the P well itself having a large area and a contact hole have resistances having great resistance values to some degree. As a result, a comparatively high electric potential is generated in a position in a P well having a great distance in a planar direction from a place (a contact hole) in which the P well is electrically connected to a source electrode
Implementation Method 2
the gate insulating film is broken by a high electric field due to the high voltage in some cases
Data Source
AI summary
A semiconductor device includes a semiconductor substrate of a first conductivity type, a drift layer of the first conductivity type which is formed on a first main surface of the semiconductor substrate, a second well region of a second conductivity type which is formed to surround a cell region of the drift layer, and a source pad for electrically connecting the second well regions and a source region of the cell region through a first well contact hole provided to penetrate a gate insulating film on the second well region, a second well contact hole provided to penetrate a field insulating film on the second well region and a source contact hole.