Semiconductor Gate Insulation Segmentation for Nonvolatile Memory
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Solution Overview
Problem
Current semiconductor devices with nonvolatile memory technologies face challenges in reliability and performance, particularly in maintaining threshold voltage stability and read current efficiency due to limitations in breakdown voltage and retention characteristics during erase operations.
Innovation Solution
The semiconductor device incorporates a lamination structure with insulation films MZ and ZF, where ZF is not formed under the memory gate electrode, allowing for increased total thickness between the control and memory gate electrodes, enhancing breakdown voltage and reducing electric field exposure during erase operations, thus improving retention characteristics and read current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the total thickness of gate insulation films is increased to enhance breakdown voltage, then reliability is improved, but device complexity increases due to additional insulation film layers
Solution Approach 1:
The gate insulation film is segmented into multiple distinct layers: a first gate insulation film (MZ) and a second gate insulation film (ZF). This segmentation allows each layer to serve specific functions - MZ provides the primary insulation barrier while ZF adds enhanced breakdown voltage protection - thereby improving reliability without requiring a single excessively thick film that would complicate the overall structure.
Solution Approach 2:
The patent applies local quality by positioning the second gate insulation film (ZF) specifically between the control gate electrode and memory gate electrode, but not extending it under the memory gate electrode. This localized application optimizes the breakdown voltage enhancement exactly where it is most needed (between the two gates) while avoiding unnecessary complexity in other regions of the device.
2Reliability
If the gate insulation film thickness is increased to improve retention characteristics, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
Rather than requiring a single thick gate insulation film that would be difficult to control with precise thickness uniformity, the patent segments the insulation into two separate films (MZ and ZF). Each film can be deposited and controlled independently within standard manufacturing capabilities, achieving the cumulative thickness needed for improved retention characteristics while maintaining manufacturability.
Solution Approach 2:
The patent changes the structural parameter of the gate insulation from a single-layer configuration to a multi-layer configuration. This parameter change allows the system to achieve the desired electrical characteristics (improved retention) through the combined effect of multiple thinner, more easily controlled films rather than one thick film that would be difficult to manufacture with precision.
3Reliability
If the gate insulation film structure is modified to reduce electric field exposure during erase operations, then reliability is improved, but device complexity increases
Solution Approach 1:
The second gate insulation film (ZF) is applied locally only in the region between the control gate electrode and memory gate electrode, where the electric field is most intense during erase operations. This localized enhancement reduces electric field exposure precisely where needed without adding unnecessary structural complexity to other parts of the device.
Solution Approach 2:
The second gate insulation film (ZF) acts as an intermediary layer between the control gate electrode and memory gate electrode. This intermediate structure mediates the electric field interaction during erase operations, reducing direct field exposure to the charge accumulation region while maintaining the necessary electrical connectivity and device functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the breakdown voltage between the control and memory gate electrodes, stabilizes threshold voltage, and increases read current, leading to improved reliability and performance of nonvolatile memory devices.
Implementation Method 1
The storage devices use charge accumulation states at the floating gates or the trapping insulation film as stored information
Implementation Method 2
The second gate insulation film is formed across between the semiconductor substrate and the second gate electrode, and between the first gate electrode and the second gate electrode
Data Source
AI summary
The reliability and performances of a semiconductor device having a nonvolatile memory are improved. A control gate electrode is formed over a semiconductor substrate via a first insulation film. A memory gate electrode is formed over the semiconductor substrate via a second insulation film having a charge accumulation part. The second insulation film is formed across between the semiconductor substrate and the memory gate electrode, and between the control gate electrode and the memory gate electrode. Between the control gate electrode and the memory gate electrode, a third insulation film is formed between the second insulation film and the memory gate electrode. The third insulation film is not formed under the memory gate electrode. A part of the memory gate electrode is present under the lower end face of the third insulation film.