3D Semiconductor Gate Stacked Structures with Support Insulating Layer

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Solution Overview

Problem

Three-dimensional semiconductor devices face structural distortion issues during manufacturing due to the stacking of interlayer insulating layers and conductive patterns, which affects their integration and stability.

Innovation Solution

The semiconductor device incorporates gate stacked structures with a common source line having uneven sidewalls and a support insulating layer filling concave portions between the gate stacked structures, along with a manufacturing method involving alternating material layers, slits, and sacrificial material removal to enhance structural stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the height of the stacked structure is increased to improve integration degree, then the integration degree is improved, but structural distortion such as bending of the stacked structure occurs

Engineering Contradiction:
Improveintegration degreeVSAvoidstructural stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The stacked structure is divided into multiple segments by forming slits that extend in the first direction, creating separated regions that can be independently supported. This segmentation prevents the entire stacked structure from bending as a single unit, thereby maintaining structural stability while allowing increased height for higher integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material layers including first material layers, second material layers with different etch rates, sacrificial material layers, and support structures. These composite layers work together to provide mechanical support and prevent bending of the stacked structure, enabling increased height without compromising structural stability.

Inventive Principle:
Principle #40Composite materials

2Productivity

If the stacked structure is divided into multiple gate stacked structures by forming slits, then the integration degree is improved, but the manufacturing process complexity increases

Engineering Contradiction:
Improveintegration degreeVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The slits are formed and support structures are prepared in advance before the final gate electrode formation. This preliminary action allows the stacked structure to be pre-segmented and supported, simplifying subsequent manufacturing steps while achieving high integration through the divided gate stacked structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Sacrificial material layers are used as intermediaries during the manufacturing process. These temporary structures facilitate the formation of slits and support regions, and are later removed to create the final divided gate structure. This intermediary approach simplifies the overall manufacturing process by breaking it into manageable stages.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10553602B2Semiconductor device and manufacturing method thereof
Publication Date: 2020.02.04 SK HYNIX INC
  • US10553602B2 patent drawing
  • US10553602B2 patent drawing
  • US10553602B2 patent drawing

AI summary

A semiconductor device includes gate stacked structures surrounding channel layers, a common source line filling a separation area between the gate stacked structures adjacent to each other and having an upper surface including first concave portions, and a support insulating layer filling the first concave portions and having sidewalls facing portions of the channel layers.