Semiconductor Grid Gate Structure Reducing Parasitic Capacitance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices with needle-shaped field plate structures face challenges in reducing parasitic capacitances and maintaining reliable performance, particularly in increasing active transistor area and channel width while minimizing adverse effects on blocking capability.
Innovation Solution
The implementation of a grid structure with stripe-shaped gate edge portions and wider gate node portions that connect multiple gate edge portions, along with connection sections between neighboring transistor sections, enhances the semiconductor device by reducing parasitic capacitances and optimizing the active transistor area without compromising blocking capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If needle-shaped field plate structures are used to increase active transistor area, then channel width can be increased, but parasitic capacitances increase
Solution Approach 1:
The gate structure is segmented into multiple independent gate lines instead of a continuous gate structure. This segmentation reduces the overlapping area between gate and drain, thereby reducing parasitic capacitances while maintaining the active transistor area through the grid-like arrangement of gate lines between needle-shaped field plate structures
Solution Approach 2:
The gate structure transitions from a two-dimensional planar gate to a three-dimensional grid-like structure with gate lines extending in multiple directions. This dimensional change allows the gate to cover the same active area while minimizing parasitic capacitance through optimized spatial arrangement
2Area of moving object
If needle-shaped field plate structures are used to increase active transistor area, then channel width can be increased, but blocking capability deteriorates
Solution Approach 1:
The needle-shaped field plate structures provide localized electric field control at critical regions where high voltage blocking is needed, while the grid-like gate structure provides uniform control across the active transistor area. This local quality differentiation maintains blocking capability in high-field regions while enabling increased channel width in active regions
Solution Approach 2:
The dopant concentration in the drift portion is increased to maintain blocking capability despite the reduced field plate coverage area. The needle-shaped field plates are strategically positioned to control electric field distribution, allowing higher dopant concentrations that maintain breakdown voltage while enabling wider channels
3Object-generated harmful factors
If grid structure with gate node portions is used to reduce parasitic capacitances, then device complexity increases
Solution Approach 1:
Multiple gate lines are merged at gate node portions to form a unified grid structure. This merging approach reduces the total number of separate gate components while maintaining the parasitic capacitance reduction benefits of segmentation, as the gate nodes provide efficient electrical connection points that simplify the overall structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces parasitic capacitances and on-state resistance, improving the reliability and performance of semiconductor devices by increasing the channel width and maintaining high dopant concentrations in the drift zone.
Implementation Method 1
field plate structures extending from one side into the semiconductor die deplete a drift portion of the semiconductor die
Implementation Method 2
Shrinking the field plate structures to needle-shaped field plate structures increases an active transistor area and allows for increasing the total channel width by forming a grid-like gate structure between the field plate structures
Data Source
AI summary
A semiconductor device includes needle-shaped field plate structures extending from a first surface into transistor sections of a semiconductor portion in a transistor cell area. A grid structure separates the transistor sections from each other. The grid structure includes: stripe-shaped gate edge portions extending along one edge of the transistor sections, respectively; gate node portions wider than the gate edge portions and connecting two or more of the gate edge portions, respectively; and one or more connection sections of the semiconductor portion, wherein the one or more connection sections extend between neighboring transistor sections.