Semiconductor Device Ground Transistor Integration
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Solution Overview
Problem
Current semiconductor devices face challenges in enhancing integration density and performance, particularly in the peripheral circuit region, where high-voltage and low-voltage devices are not optimally integrated, leading to reduced efficiency and increased area usage.
Innovation Solution
The semiconductor devices incorporate low-voltage and high-voltage devices arranged in different directions within the peripheral circuit region, with ground transistors sharing a common gate structure and active region, allowing for reduced area occupation and improved performance by optimizing the arrangement of transistors and voltage application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ground transistors are arranged in conventional separate structures, then each transistor can be independently controlled, but the area occupied by ground transistors increases, reducing integration density
Solution Approach 1:
Multiple ground transistors share a common gate structure and a common active region, merging previously separate transistor components into a unified structure that reduces total area while maintaining individual control through separate gate electrodes
Solution Approach 2:
The common gate structure serves multiple ground transistors simultaneously, allowing a single structural element to perform the function of controlling multiple transistors, thereby reducing redundancy and increasing integration density
2Ease of manufacture
If low-voltage and high-voltage devices are arranged in the same direction, then layout simplicity is maintained, but integration density of the peripheral circuit region is reduced
Solution Approach 1:
Low-voltage devices and high-voltage devices are arranged in different directional orientations within the peripheral circuit region, utilizing spatial dimensionality to pack devices more efficiently and increase integration density while maintaining manufacturability
3Reliability
If ground transistors use individual gate structures, then each transistor has optimized electrical characteristics, but the overall area and device complexity increase
Solution Approach 1:
Multiple ground transistors share a common gate structure with individual gate electrodes, merging structural components while maintaining electrical independence, thereby reducing device complexity and area without sacrificing electrical performance
Data Source
AI summary
A semiconductor device includes a memory cell array including a plurality of memory blocks, each of the plurality of memory blocks including select transistors and memory cells; pass transistors configured to provide select signals to select lines connected to a selected memory block; and ground transistors configured to supply a first voltage to select lines connected to unselected memory blocks. The ground transistors include at least one common gate structure, at least one common active region, and individual active regions, and each of the common gate structure and the common active region are shared by two or more ground transistors, among the ground transistors. The common gate structure is between the common active region and the individual active regions, and includes a first region extending in a first direction and a second region extending in a second direction, intersecting the first direction.