Semiconductor Memory Cell Guard Ring Ion Implantation
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Solution Overview
Problem
Existing semiconductor memory cells face challenges in suppressing leakage current through the storage diffusion layer, especially at high temperatures, which affects charge retention characteristics.
Innovation Solution
A method involving ion implantation through an insulating film to form a storage diffusion layer with a higher impurity concentration, reducing junction leakage current and enhancing charge retention by modifying the impurity concentration profile and depth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the temperature is increased to improve manufacturing process, then the leakage current through the storage diffusion layer increases significantly, but the charge retention characteristic deteriorates
Solution Approach 1:
The patent applies local quality by creating a guard ring structure with specific impurity concentration distribution around the storage diffusion layer. The guard ring has a different impurity concentration profile compared to the storage diffusion layer, with higher impurity concentration at the periphery that decreases toward the center. This localized variation in impurity concentration suppresses leakage current at the junction interface without affecting the overall capacitor performance, thereby resolving the contradiction between temperature operation and charge retention.
Solution Approach 2:
The patent changes the impurity concentration parameter by forming a guard ring with a specific impurity concentration profile that differs from the storage diffusion layer. The guard ring is formed with higher impurity concentration at its outer region that gradually decreases toward the inner region, creating a parameter gradient that suppresses leakage current. This parameter change in impurity concentration distribution enables the structure to maintain low leakage current even at elevated temperatures while preserving charge retention characteristics.
2Reliability
If the impurity concentration in the storage diffusion layer is increased to reduce junction leakage current, then the leakage current decreases, but the manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent applies segmentation by dividing the doped region into two distinct parts: the storage diffusion layer with lower impurity concentration and the guard ring with higher impurity concentration. This segmentation allows independent optimization of each region's impurity concentration through separate implantation processes. The guard ring is formed after the storage diffusion layer, enabling precise control of impurity concentration in each region without mutual interference, thereby achieving both leakage current suppression and manufacturing precision.
Solution Approach 2:
The patent applies preliminary action by first forming the storage diffusion layer with a specific impurity concentration, and then subsequently forming the guard ring with a different impurity concentration profile. This sequential approach allows the storage diffusion layer to be optimized for charge storage first, and then the guard ring to be added to suppress leakage current. The preliminary formation of the storage diffusion layer establishes a baseline that guides the subsequent guard ring formation process, ensuring both regions achieve their target impurity concentrations with high precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces leakage current and maintains high on-current performance, even at elevated temperatures, thereby improving the charge retention and operational efficiency of semiconductor memory cells.
Implementation Method 1
implanting a first impurity of a second electrical conduction type into the semiconductor substrate, so as to form a region of the second electrical conduction type
Data Source
AI summary
A method for manufacturing a semiconductor device includes preparing a semiconductor substrate having a first region of a first electrical conduction type as a part of a surface layer of the semiconductor substrate and a first gate electrode and a capacitor structure, the first gate electrode and the capacitor structure being disposed on the first region; forming a first insulating film covering the first gate electrode and the capacitor structure, the first insulating film being covering the surface of the semiconductor substrate; implanting a first impurity of a second electrical conduction type into the semiconductor substrate, so as to form a region of the second electrical conduction type in each of a second region and a third region, the second region being a region between the first gate electrode and the capacitor structure, the third region being a region opposite to the capacitor structure with the first gate electrode therebetween.