Semiconductor Hard Mask Pattern via Spacer Merge Cut
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Solution Overview
Problem
The increasing feature densities in semiconductor devices at 5 nm/7 nm nodes and beyond pose challenges in BEOL interconnect processing due to varying topography, leading to issues with insulating material filling in spacer openings, which can result in short circuits or disconnects.
Innovation Solution
The underlayer merge cut approach improves the hard mask pattern process window by forming a mandrel underlayer with merge cuts and using a spacer layer to merge these cuts, allowing for precise control of interconnect formation and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional BEOL interconnect processing is used at 5 nm/7 nm nodes, then manufacturing simplicity is maintained, but varying topography causes insulating material filling issues leading to short circuits or disconnects
Solution Approach 1:
The patent divides the interconnect formation process into multiple sequential steps: forming mandrels, creating spacers, performing merge cuts, and selective removal. This segmentation allows precise control over insulating material placement in varying topography regions, preventing both short circuits and disconnects while managing complexity through structured process steps
Solution Approach 2:
The patent performs preliminary actions by pre-forming mandrels and spacers before final interconnect formation. The merge cut operation is performed in advance to create controlled openings, and insulating material is pre-positioned in these openings. This preliminary preparation ensures proper material distribution across varying topography before subsequent interconnect formation, improving reliability
2Productivity
If feature densities are increased at 5 nm/7 nm nodes, then device capacity is improved, but topography variation makes insulating material filling more difficult
Solution Approach 1:
The patent applies local quality by creating region-specific structures through merge cuts and spacers. Different areas of the substrate receive tailored treatments: some regions have insulating material filled in spacer openings while others do not, based on local topography requirements. This localized approach enables precise control of material filling despite varying densities across the device
Solution Approach 2:
The patent introduces intermediary structures (mandrels, spacers, and merge cut openings) that mediate between the varying topography and the insulating material filling process. These intermediaries create controlled interfaces that facilitate precise material placement in high-density regions while maintaining manufacturability
3Loss of substance
If too little insulating material is filled in spacer openings, then material usage is optimized, but short circuits occur in subsequent interconnect formation
Solution Approach 1:
The patent implements feedback control through the merge cut process, where the presence and characteristics of spacers provide information about where insulating material should be placed. The merge cut operation responds to the spacer configuration, creating openings only where needed, thereby optimizing material usage while ensuring sufficient insulation to prevent short circuits
4Reliability
If too much insulating material is filled in spacers, then reliability is improved, but disconnects are formed in subsequent interconnect formation
Solution Approach 1:
The patent segments the spacer structures through merge cuts, creating discrete regions where insulating material is filled. This segmentation prevents excessive material accumulation that would cause disconnects, while still providing sufficient insulation where needed. The controlled division of spacer regions enables precise interconnect formation without defects
Data Source
AI summary
A method for manufacturing a semiconductor device includes forming a hard mask layer overlying a device layer of a semiconductor device, a mandrel underlayer over hard mask layer, and a mandrel layer over mandrel underlayer. The mandrel layer has a plurality of mandrel lines extending along a first direction. A plurality of openings are formed in mandrel underlayer extending in a second direction substantially perpendicular to first direction. A spacer layer is formed over mandrel underlayer and layer. Spacer layer fills plurality of openings in underlayer. Portions of spacer layer are removed to expose an upper surface of underlayer and mandrel layer, and mandrel layer is removed. By using remaining portions of spacer layer as a mask, underlayer and hard mask layer are removed, to form a hard mask pattern with first hard mask pattern lines extending along first direction and second hard mask pattern lines extending along second direction.