Semiconductor Device High-Flatness Mounting via Recessed Wiring

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Solution Overview

Problem

Existing methods for mounting imaging elements on substrates, such as glass wiring boards, face challenges in achieving high flatness while maintaining low costs, as they often require additional steps and increased material costs due to the need for precise alignment and removal of build-up wiring layers.

Innovation Solution

A manufacturing method involving a multilayer wiring structure with conductive and insulating layers, where an opening is formed to connect the imaging element directly to a conductive layer closer to the core substrate, allowing for bump connection and the use of a protective resin to seal and protect the connection, thereby ensuring high flatness and low-profile mounting without increasing manufacturing steps or material waste.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If part of the build-up wiring layer is removed with a release sheet to enable low-profile mounting, then the element can be mounted close to the core substrate, but the manufacturing cost increases due to additional process steps and material waste

Engineering Contradiction:
Improvemounting heightVSAvoidmanufacturing cost
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by forming a recess in the build-up wiring layer before mounting the imaging element. This recess is created through etching or milling processes that remove material in advance, providing a pre-prepared mounting cavity that eliminates the need for additional release sheet removal steps during assembly. The recess depth is precisely controlled to achieve the desired low-profile mounting while maintaining structural integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the unnecessary portions of the build-up wiring layer to create the recess. By selectively removing material from specific areas where imaging elements will be mounted, the structure is optimized to accommodate low-profile mounting without requiring complete layer removal or additional release mechanisms. This extraction approach reduces material waste compared to removing entire wiring layers.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If an imaging element is mounted on a substrate with tilted state or warpage, then mounting flexibility is improved, but imaging quality deteriorates due to defocusing of incident light

Engineering Contradiction:
Improvemounting flexibilityVSAvoidflatness
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating localized recesses only in the specific areas where imaging elements will be mounted, rather than modifying the entire substrate. Each recess is precisely positioned and sized to accommodate the imaging element's thickness, providing perfect flatness contact at the mounting interface. This localized approach maintains overall substrate flexibility while ensuring precise flatness where needed for optical performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The recesses are formed in advance during substrate fabrication, before imaging elements are mounted. This preliminary preparation ensures that when elements are installed, they make perfect flat contact with the substrate surface, eliminating warpage and tilt issues. The pre-formed recesses guarantee consistent flatness across all mounting positions without requiring post-mounting adjustment.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If build-up wiring layers are stacked on both surfaces of core substrate with through electrodes, then electrical connectivity is improved, but the complexity of forming openings and removing wiring layers increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the build-up wiring layer into functional regions: areas with complete wiring structures for electrical connectivity and localized recess areas for imaging element mounting. The wiring layer is divided into first and second regions with different characteristics - the first region maintains full wiring for signal transmission, while the second region has removed portions to create mounting recesses. This segmentation allows simultaneous achievement of electrical connectivity and low-profile mounting.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different structural qualities are applied to different regions of the substrate. Areas requiring electrical connectivity maintain the full multilayer wiring structure with through electrodes, while areas requiring imaging element mounting have localized material removal to create recesses. This local differentiation optimizes each region for its specific function without compromising overall system performance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables high-flatness component mounting at low cost by simplifying the manufacturing process, reducing material waste, and minimizing stress on the imaging element, thus enhancing imaging quality and reliability.

Implementation Method 1

forming a conductive layer adjacent to the predetermined conductive layer by removing the seed metal on the adjacent insulating layer including the opening portion, after plating is performed and the resist is removed

Methodology Applied
Scientific EffectPlating: Electroplating

Data Source

PatentUS11043436B2Semiconductor device, manufacturing method, imaging device, and electronic apparatus for enabling component mounting with high flatness
Publication Date: 2021.06.22 SONY GROUP CORP
  • US11043436B2 patent drawing
  • US11043436B2 patent drawing
  • US11043436B2 patent drawing

AI summary

The present technology relates to a semiconductor device and a manufacturing method, an imaging device, and an electronic apparatus that enable component mounting with high flatness at low cost. A semiconductor device includes: a core substrate: a multilayer wiring layer that includes a plurality of conductive layers and a plurality of insulating layers, and is formed on a surface of the core substrate; an opening that is formed in the multilayer wiring layer, and penetrates through at least the outermost insulating layer farthest from the core substrate among the plurality of insulating layers; and a mount element connected to a pad portion provided on a predetermined conductive layer located closer to the core substrate than the outermost conductive layer farthest from the core substrate among the plurality of conductive layers in the opening. The present technology can be applied to imaging devices.