Semiconductor High Side Region Segmentation for Voltage Isolation
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Solution Overview
Problem
High voltage semiconductor devices in half bridge gate drivers are costly and perform poorly due to their larger size and limited single high voltage operation, which restricts the overall chip performance and increases costs.
Innovation Solution
Incorporating low voltage devices in the high side region with isolation structures between them and high voltage devices, allowing for efficient size reduction and preventing short circuits, while enabling multiple voltage operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage devices are used in the high side region, then voltage isolation is achieved, but device size increases and performance deteriorates
Solution Approach 1:
The high side region is segmented into multiple isolation regions (first isolation region, second isolation region, third isolation region) that separately accommodate high voltage devices and low voltage devices. This segmentation allows each region to be optimized independently, enabling small low voltage devices to be placed in isolated zones without interfering with high voltage device requirements, thus reducing overall device size while maintaining voltage isolation.
Solution Approach 2:
Different regions within the high side region are assigned different electrical characteristics and isolation requirements. The first isolation region contains high voltage devices with specific isolation structures, while the second and third isolation regions contain low voltage devices with different isolation needs. This local quality differentiation allows low voltage devices to be miniaturized in regions where high voltage isolation is not required, resolving the contradiction between isolation reliability and device size.
2Reliability
If high voltage devices are used in the high side region, then voltage isolation is achieved, but overall chip performance deteriorates
Solution Approach 1:
The high side region is divided into multiple functional segments: a first isolation region for high voltage devices and second/third isolation regions for low voltage devices. This segmentation enables the chip to simultaneously perform high voltage operations and low voltage logic operations in parallel, improving overall productivity and chip performance while maintaining voltage isolation through dedicated isolation structures between regions.
Solution Approach 2:
The high side region is designed to support multiple voltage levels and device types within different isolation regions. The first isolation region handles high voltage functions, while the second and third isolation regions handle low voltage logic functions. This multi-functionality allows the chip to perform both high voltage power switching and low voltage control operations simultaneously, enhancing overall chip performance without compromising voltage isolation.
3Area of moving object
If low voltage devices are placed in the high side region without isolation structures, then device size is reduced, but short circuit between high and low voltage devices occurs
Solution Approach 1:
The high side region is segmented into electrically isolated zones using first, second, and third isolation structures. Low voltage devices are placed in the second and third isolation regions, which are electrically separated from the first isolation region containing high voltage devices. This segmentation allows low voltage devices to be miniaturized and placed close to high voltage devices while preventing short circuits through the isolation structures that block electrical interference and breakdown paths.
Solution Approach 2:
Isolation structures (including isolation trenches filled with insulating materials and doped semiconductor regions) are introduced as intermediary elements between high voltage devices and low voltage devices. These isolation structures act as electrical barriers that prevent charge injection, breakdown, and short circuits while allowing the devices to be placed in close proximity. This intermediary approach enables device size reduction without compromising short circuit prevention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces device size, enhances performance, and prevents short circuits between high and low voltage devices, enabling efficient high voltage operations with improved chip performance and reduced costs.
Implementation Method 1
at least one isolation structure is further located between the devices with different operating voltages
Implementation Method 2
the second conductivity type doped region is a P-type doped region
Data Source
AI summary
A semiconductor apparatus includes a high side region and a low side region, wherein the high side region includes semiconductor devices, and those semiconductor devices have at least two devices with different operating voltages. In the high side region, at least one isolation structure is located between the devices with different operating voltages to prevent short circuit between the devices.