3D Semiconductor Interconnects Using Encapsulant Structural Support
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to create smaller, more efficient 3-D semiconductor devices with improved interconnect structures that minimize the need for temporary carriers, which can lead to breakage and increase manufacturing costs, while also allowing for higher processing temperatures and reduced substrate thickness for better handling and electrical connectivity.
Innovation Solution
A method involving the formation of interconnect structures on a substrate, mounting semiconductor dies, depositing an encapsulant for structural support, and forming vias and conductive layers to enable electrical connections, which allows for reduced substrate thickness and eliminates the need for temporary carriers, thereby enhancing handling and processing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a temporary carrier is used for structural support during THV/TSV formation, then structural support is improved, but manufacturing cost increases and processing temperature is limited to about 200°C
Solution Approach 1:
The patent removes the temporary carrier from the system entirely. Instead of using a carrier that must be bonded and later removed, the invention forms TSVs directly through the substrate using the substrate itself as the structural support, eliminating the carrier and its associated temperature limitations and cost
Solution Approach 2:
The substrate serves multiple functions: it provides structural support during processing and becomes part of the final device structure. The substrate is not just a temporary carrier but a functional component that remains in the final product, enabling higher processing temperatures and eliminating the need for carrier removal
2Reliability
If substrate thickness is reduced for better handling and electrical connectivity, then electrical connectivity is improved, but structural strength deteriorates leading to breakage and slippage
Solution Approach 1:
The patent applies different properties to different regions: the substrate is thinned in the active areas for better electrical connectivity and heat dissipation, while maintaining sufficient thickness at the edges and bonding interfaces to provide structural strength. The encapsulant provides localized structural support where needed
3Reliability
If wire bonds are used for electrical interconnection, then electrical connectivity is achieved, but package area increases due to lead bends
Solution Approach 1:
The patent transitions from planar wire bond interconnection to three-dimensional vertical interconnection through TSVs. Electrical connections are made in the vertical dimension through the substrate rather than in the planar dimension via lead bends, eliminating the need for additional package area
4Strength
If a temporary carrier is used for structural support, then structural support is provided, but device complexity increases due to bonding and de-bonding processes
Solution Approach 1:
The patent extracts and eliminates the temporary carrier and its associated bonding/de-bonding processes from the manufacturing flow. The substrate serves as its own structural support, simplifying the process to direct TSV formation without carrier manipulation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides robust structural support, reduces manufacturing costs, minimizes breakage and handling issues, and allows for higher processing temperatures, resulting in smaller, more efficient semiconductor devices with improved electrical connectivity.
Implementation Method 1
depositing an encapsulant over the semiconductor die or component and first interconnect structure
Implementation Method 2
forming a via through a second surface of the substrate, opposite the first surface of the substrate, to the first interconnect structure
Implementation Method 3
conformally applying a first insulating layer over a sidewall of the via
Data Source
AI summary
A semiconductor device has a first interconnect structure formed over a first side of a substrate. A semiconductor die is mounted to the first interconnect structure. An encapsulant is deposited over the semiconductor die and first interconnect structure for structural support. A portion of a second side of the substrate, opposite the first side of the substrate, is removed to reduce its thickness. The encapsulant maintains substrate robustness during thinning process. A TSV is formed through the second side of the substrate to the first interconnect structure. A second interconnect structure is formed in the TSV. The TSV has a first insulating layer formed over the second side of the substrate and first conductive layer formed over the first insulating layer and into the TSV. The second interconnect structure has a second conductive layer formed over the first conductive layer in an area away from the TSV.