Semiconductor Interconnection Etching Stopper Film
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Solution Overview
Problem
In semiconductor devices with multilayer interconnection structures, the use of copper as a wiring material leads to undesired etching of interlayer insulating films, resulting in increased parasitic capacitance, reduced withstand voltage, and non-uniform wiring resistances due to recess formation during the manufacturing process.
Innovation Solution
A semiconductor device configuration that includes a conductive lower layer wiring, an etching stopper film, an interlayer insulating film, an intermediate film with etching selectivity, and upper layer wiring made of copper, with a via for electrical connection, where the intermediate film prevents undesired etching of the interlayer insulating film by maintaining its integrity during the etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Cu is used as a wiring material to reduce wiring resistance, then conductivity is improved, but undesired etching of interlayer insulating films occurs during manufacturing
Solution Approach 1:
An intermediate film made of SiO2 is introduced between the etching stopper film (SiCO) and the interlayer insulating film (SiOC). This intermediate film acts as a mediator that is selectively etched away during the opening formation process, allowing the etchant to reach and etch the etching stopper film without causing undesired etching of the interlayer insulating film. The intermediate film has etching selectivity with respect to SiCO, enabling controlled removal while protecting the underlying insulating film.
2Ease of manufacture
If the etching stopper film is etched to form openings, then via holes are formed for electrical connection, but the interlayer insulating film below becomes etched causing recess formation
Solution Approach 1:
The intermediate film serves as a sacrificial layer that facilitates the etching process. By being selectively removed, it enables the formation of openings through the etching stopper film while preventing the etchant from attacking the interlayer insulating film, thus avoiding recess formation and maintaining film thickness uniformity.
Solution Approach 2:
The intermediate film is formed in advance before the opening formation process. This preliminary action prepares the structure for selective etching, ensuring that when the opening is formed, the etchant will stop at the intermediate film interface without penetrating into the interlayer insulating film, thereby preventing unwanted recesses.
3Ease of manufacture
If the intermediate film is removed to expose the interlayer insulating film, then wiring connections can be made, but parasitic capacitance increases due to reduced film thickness
Solution Approach 1:
The intermediate film is selectively removed only in the regions where openings are formed, while remaining intact in other areas. This selective removal allows wiring connections to be made where needed while maintaining the interlayer insulating film thickness in regions where connections are not required, thereby minimizing parasitic capacitance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents undesired etching of the interlayer insulating film, maintaining uniformity in wiring resistances and enhancing the withstand voltage by ensuring the intermediate film remains intact, thus improving the reliability of the semiconductor device.
Implementation Method 1
an intermediate film laminated on the interlayer insulating film and made of a material having an etching selectivity with respect to a material of the etching stopper film
Data Source
AI summary
A semiconductor device includes a lower layer wiring made of a conductive material; an etching stopper film laminated on the lower layer wiring and having a laminated structure including an SiCO layer and an SiCN layer; an interlayer insulating film laminated on the etching stopper film; an intermediate film laminated on the interlayer insulating film and made of a material having an etching selectivity with respect to a material of the etching stopper film; an upper wiring layer laminated on the intermediate film and having an upper groove formed in a top surface thereof; an upper layer wiring embedded in the upper groove and made of a metal material having Cu as a main component; and a via electrically connecting the lower layer wiring and the upper layer wiring and disposed in a via hole penetrating through the interlayer insulating film and the intermediate film.