Semiconductor Device Internal Chip Selection Signal for Read Operation Malfunction Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Nonvolatile memory devices may malfunction during read operations if a command is received while the device is initializing voltages, leading to communication disruptions with the memory controller.
Innovation Solution
A semiconductor device and method that include a chip selection signal receiver, a data signal receiver, an operation controller, and an internal signal generator. The internal signal generator outputs an inactivated internal chip selection signal when a command other than a data output command is received during a read operation, preventing further commands from interfering with the ongoing operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the memory device outputs data stored in memory cells while initializing voltages, then the response speed is improved, but the device may malfunction if a command is received during voltage initialization
Solution Approach 1:
An internal chip selection signal is introduced as an intermediary between the external chip selection signal and the operation controller. This internal signal acts as a mediator that blocks commands from reaching the operation controller during voltage discharge, preventing malfunctions while allowing data output to proceed at high speed
Solution Approach 2:
The harmful factor (command reception during voltage discharge) is extracted and isolated by using the internal chip selection signal to block only command transfer to the operation controller, while the data output function remains operational. This separates the data output path from the command processing path during the discharge period
2Adaptability or versatility
If the memory device processes commands during read operation, then communication with memory controller is maintained, but the read operation may be interrupted causing malfunction
Solution Approach 1:
The internal chip selection signal dynamically changes state based on the operation phase: it is activated during normal read operations to allow command processing, and deactivated during voltage discharge to block commands. This dynamic adjustment ensures communication capability is maintained when safe while protecting the read operation during vulnerable periods
Data Source
AI summary
A semiconductor device includes a chip selection signal receiver configured to receive, from an external memory controller, a chip selection signal activating to a state in which communication is possible with the external memory controller. The semiconductor device also includes a data signal receiver configured to receive a command and an address from the external memory controller. The semiconductor device further includes an operation controller configured to perform an internal operation according to the command and the address received through the data signal receiver while the chip selection signal is input. The semiconductor device additionally includes an internal signal generator configured to output an inactivated internal chip selection signal blocking transferal of the chip selection signal to the operation controller when a command other than a command requesting an output of data is received while the internal operation is performed.