Internal Loopback for Semiconductor I/O Circuit Testing
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Solution Overview
Problem
High capacitance at input/output (I/O) contacts of semiconductor dies complicates the testing of I/O circuits, especially for high-speed signal transfer, as it can make test voltage signals unreliable, and existing methods are often impractical or expensive.
Innovation Solution
The semiconductor die is configured to test its I/O circuit by looping back a test voltage signal from the output circuit to the input circuit, avoiding the high capacitance node and allowing for accurate testing of high-speed signal transfer without the need for expensive or complex circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If test voltage signals are applied through I/O contacts to test high-speed signal transfer, then the I/O circuit testing capability is improved, but the high capacitance at I/O contacts makes test voltage signals unreliable
Solution Approach 1:
The patent introduces an intermediary testing mechanism by routing the test voltage signal through the output circuit and feeding it back to the input circuit via internal connections. This intermediary path bypasses the high-capacitance I/O contacts, allowing accurate high-speed signal transfer testing without the reliability issues caused by contact capacitance.
Solution Approach 2:
Instead of applying test signals externally through I/O contacts (conventional approach), the patent inverts the testing methodology by generating test signals internally through the output circuit and routing them to the input circuit. This reversal eliminates the need to drive signals through high-capacitance contacts, solving the reliability problem while maintaining testing effectiveness.
2Ease of manufacture
If conventional testing methods are used to test I/O circuits, then the testing process is simple, but it becomes impractical or expensive for high-speed signal transfer testing
Solution Approach 1:
The patent makes the I/O circuit multi-functional by enabling it to perform both its normal data transfer function and its own self-testing function. The output circuit can drive both external loads and internal test paths, while the input circuit can receive both external data and internal test signals. This universality allows the circuit to adapt to high-speed testing requirements without requiring separate dedicated test equipment or complex external testing arrangements.
3Device complexity
If I/O contacts are used for both normal operation and testing, then the device structure is simplified, but the high capacitance interferes with accurate high-speed signal testing
Solution Approach 1:
The patent segments the testing function from the normal operational function by creating a dedicated internal test path that is separate from the external I/O contact path. The test voltage signal is routed through distinct internal connections between the output and input circuits, physically separating the high-frequency test signal path from the high-capacitance I/O contacts. This segmentation allows accurate high-speed testing without being affected by contact capacitance, while maintaining the simplified device structure of using the same I/O contacts for both purposes.
Data Source
AI summary
Technology is disclosed herein for a semiconductor die, and controlling operation of the semiconductor die. In some aspects, a semiconductor die is configured to test an I/O circuit on the semiconductor die. The semiconductor die has an input circuit that compares a voltage signal at one of a first input or a second input with a reference voltage at the other of the first input or the second input to generate an input voltage signal. The first input may be connected to an I/O contact. During a normal mode a control circuit on the die provides a reference voltage to second input. During a test mode, the control circuit internally loops back a test signal from an output circuit to the second input of the input circuit. Thus, the test signal avoids the I/O contact.