Semiconductor I/O Multiplexer Layout Area Reduction
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Solution Overview
Problem
Conventional semiconductor multiplexers face challenges in reducing layout area, particularly in designs with increased prefetch bits, leading to increased chip size and difficulties in securing appropriate layout space due to dense driver configurations and multiplexer connections.
Innovation Solution
The implementation of first and second multiplexers on either side of global I/O lines, with the first multiplexer located between data I/O pads and global I/O lines and the second multiplexer between global and local I/O lines, reduces layout area by optimizing driver configurations and spacing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple drivers are configured densely around data I/O pads to handle increased prefetch bits, then data transmission capability is improved, but layout area increases and chip size expands
Solution Approach 1:
The multiplexer is divided into two separate components: a first multiplexer located between data I/O pads and global I/O lines, and a second multiplexer located between global I/O lines and local I/O lines. This segmentation distributes the multiplexing function across two stages, reducing the density and area requirement at any single location compared to a single large multiplexer configuration.
Solution Approach 2:
The patent reorganizes the multiplexer architecture from a single-layer dense configuration to a two-stage distributed configuration across different spatial dimensions. The first multiplexer handles data I/O pad connections while the second handles local I/O line connections, effectively using dimensional distribution to reduce area concentration.
2Productivity
If drivers are densely configured around data I/O pads, then data transmission capability is improved, but securing appropriate layout space becomes difficult
Solution Approach 1:
By segmenting the multiplexer into two separate multiplexers positioned at different locations, the design reduces the concentration of drivers around any single data I/O pad, making it easier to secure appropriate layout space while maintaining data transmission capability.
Solution Approach 2:
The first multiplexer acts as an intermediary between data I/O pads and global I/O lines, while the second multiplexer serves as an intermediary between global I/O lines and local I/O lines. This intermediary structure distributes the driver configuration across multiple stages and locations, easing layout constraints.
3Productivity
If multiplexer connections are densely arranged, then data transmission capability is improved, but internal circuit interference increases
Solution Approach 1:
The dense multiplexer connections are segmented into two separate multiplexer stages. The first multiplexer handles connections between data I/O pads and global I/O lines, while the second handles connections between global I/O lines and local I/O lines. This segmentation increases spatial separation between connection points, reducing circuit interference while maintaining data transmission capability.
Data Source
AI summary
There is provided an input/output multiplexer capable of reducing a layout area in designing a device by disposing first and second multiplexers at either side of a specific data input/output (I/O) pad. An apparatus for multiplexing data inputted or outputted to a global input/output (I/O) line includes a first multiplexer for multiplexing the data and supplying a first multiplexed data to the global I/O line and a second multiplexer for multiplexing the first multiplexed data supplied to the global I/O line, wherein the first and second multiplexers are formed at either side of the global I/O line.