Semiconductor Device with Embedded IPDs and Conductive Pillars

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Solution Overview

Problem

Semiconductor devices face challenges in efficiently interconnecting pre-fabricated Integrated Passive Devices (IPDs) with other active and passive devices, particularly in high-frequency applications, due to issues like electromagnetic interference (EMI) and complex manufacturing processes, which complicate integration and increase costs.

Innovation Solution

The semiconductor device employs conductive pillars to electrically interconnect pre-fabricated IPDs with other active and passive devices, using a self-aligned configuration with metal-insulator-metal capacitors and resistors, and encapsulates them with a discrete capacitor, providing effective EMI and RFI protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive through silicon vias (TSV) are used to interconnect IPDs, then electrical interconnection is achieved, but manufacturing cost increases and device integration is complicated

Engineering Contradiction:
Improveelectrical interconnectionVSAvoiddevice integration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the interconnection structure into multiple segments: a first conductive layer for IPD mounting, conductive pillars extending upward from this layer, and a second conductive layer at the top. This segmentation allows IPDs to be mounted on the first conductive layer while connections are established through the conductive pillars to the second conductive layer, avoiding the need for complex through-silicon via fabrication while achieving reliable electrical interconnection.

Inventive Principle:
Principle #1Segmentation

2Reliability

If conductive through silicon vias (TSV) are used to interconnect IPDs, then electrical interconnection is achieved, but manufacturing cost increases

Engineering Contradiction:
Improveelectrical interconnectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The interconnection path is segmented into a first conductive layer, conductive pillars, and a second conductive layer. This segmentation enables the use of simpler, more cost-effective manufacturing processes compared to TSV fabrication, while still achieving reliable electrical interconnection between IPDs and other devices in the package.

Inventive Principle:
Principle #1Segmentation

3Reliability

If IPDs are integrated in high-frequency applications, then performance is improved, but electromagnetic interference (EMI) and radio frequency interference (RFI) increase

Engineering Contradiction:
ImproveperformanceVSAvoidelectromagnetic interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an encapsulant as an intermediary material that surrounds the conductive pillars and IPDs. This encapsulant acts as a barrier that contains and directs electromagnetic signals, reducing EMI and RFI while allowing the high-frequency performance benefits of integrated IPDs to be maintained.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If pre-fabricated IPDs are mounted to conductive layers, then manufacturing flexibility is improved, but electrical interconnection complexity increases

Engineering Contradiction:
Improvemanufacturing flexibilityVSAvoidelectrical interconnection
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent segments the interconnection structure into a first conductive layer for IPD mounting, conductive pillars for vertical connection, and a second conductive layer for final interconnection. This segmentation simplifies the mounting process for pre-fabricated IPDs while maintaining manageable electrical interconnection complexity through the structured conductive path.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9184103B2Semiconductor device having embedded integrated passive devices electrically interconnected using conductive pillars
Publication Date: 2015.11.10 JCET SEMICON (SHAOXING) CO LTD
  • US9184103B2 patent drawing
  • US9184103B2 patent drawing
  • US9184103B2 patent drawing

AI summary

A semiconductor device includes a first conductive layer and conductive pillars disposed over the first conductive layer and directly contacting the first conductive layer. The semiconductor device includes an Integrated Passive Device (IPD) mounted to the first conductive layer such that the IPD is disposed between the conductive pillars. The IPD is self-aligned to the first conductive layer, and includes a metal-insulator-metal capacitor disposed over a first substrate and a wound conductive layer forming an inductor disposed over the first substrate. The semiconductor device includes a discrete capacitor mounted over the first conductive layer. The discrete capacitor is electrically connected to one of the conductive pillars. The semiconductor device includes an encapsulant disposed around the IPD, discrete capacitor, and conductive pillars, a first insulation layer disposed over the encapsulant and conductive pillars, and a second conductive layer disposed over the first insulating layer. The second conductive layer is electrically connected to the conductive pillars.