Semiconductor Latch Circuit Reducing Area via Mode Overwrite
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Solution Overview
Problem
The increasing number of unit latches in latch circuits to store fuse data from array e-fuses during boot-up operations leads to an increase in the total area occupied by the latch circuit, making it inefficient for semiconductor devices to change operation modes effectively.
Innovation Solution
A semiconductor device design that includes a non-volatile memory area with separate regions for different operation modes, a storage circuit for unit latches, and an operation control circuit that writes and overwrites setup information in response to operation mode changes, allowing for a reduced number of unit latches and minimizing the area occupied by the latch circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of unit latches is increased to store setup information for multiple operation modes, then the device can store more operation mode data, but the total area occupied by the latch circuit increases
Solution Approach 1:
The latch circuit is designed to perform multiple functions: storing setup information for different operation modes and serving as a data bus transmission path. By making the latch circuit universal, the patent eliminates the need for separate storage structures for each operation mode, thereby reducing the total number of latches required while maintaining the ability to store multiple operation mode configurations.
Solution Approach 2:
The patent implements dynamic reconfiguration of the latch circuit where latches can be selectively activated or deactivated based on the current operation mode. This dynamic approach allows the same physical latches to serve different storage purposes at different times, effectively reducing the permanent area requirement while maintaining the capability to store setup information for multiple operation modes.
2Quantity of substance
If separate storage structures are provided for each operation mode, then data storage capability is improved, but device complexity increases
Solution Approach 1:
The latch circuit serves as a universal storage structure that handles setup information for all operation modes through selective activation. Instead of providing dedicated storage for each mode, the same latch circuit is reused across different modes by controlling which latches are active, thereby maintaining storage capacity while significantly reducing structural complexity.
Solution Approach 2:
The patent merges the storage functions for multiple operation modes into a single unified latch circuit structure. By combining what would traditionally be separate storage structures into one shared resource with selective activation, the patent reduces overall device complexity while preserving the ability to store and retrieve setup information for different operation modes.
Data Source
AI summary
A semiconductor device includes: first to Nth non-volatile memory areas, each including a plurality of cells positioned at cross points between row lines and column lines; a storage circuit including a plurality of unit latches suitable for storing data transferred from the first to Nth non-volatile memory areas; and an operation control circuit suitable for controlling setup information of first to Nth operation modes to be programmed in the first to Nth non-volatile memory areas, respectively, during a rupture mode, and controlling a data transferred from the first non-volatile memory area to be written in the unit latches and controlling a data transferred from one of the second to Nth non-volatile memory areas to be over-written in the unit latches in response to an operation mode change request, during a boot-up mode.