Semiconductor Lead Frame Asymmetry for Creepage Distance
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Solution Overview
Problem
Conventional power semiconductor devices face challenges in maintaining adequate electric clearance and creepage distance, especially under high voltage conditions, leading to potential safety hazards and operational issues due to close proximity of insulating materials and increased creepage phenomenon in humid or dusty environments.
Innovation Solution
The semiconductor device employs a lead frame design with non-equidistantly arranged leads and a plastic package structure that includes plastic extension portions to maximize the creepage distance, where the inner lead is connected with the die paddle and arranged between outer leads, and the leads are positioned to minimize distance between each other while maximizing distance between the inner and outer leads, enhancing mechanical strength and preventing deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If leads are arranged side by side with equidistance to minimize device size, then device compactness is improved, but creepage distance between leads is reduced causing safety hazards
Solution Approach 1:
The patent applies asymmetry by arranging leads with non-uniform spacing. Specifically, the distance between adjacent outer leads is made smaller than the distance between the inner lead and outer leads. This asymmetric configuration allows the device to maintain compact overall dimensions while ensuring adequate creepage distance between the inner lead (connected to die paddle) and outer leads, thereby resolving the contradiction between device compactness and electrical safety.
Solution Approach 2:
The patent utilizes three-dimensional spatial arrangement by positioning leads at different heights relative to the plastic package body. The inner lead is arranged closer to the plastic package body while outer leads are positioned further away, creating vertical dimensionality. This dimensional approach increases the effective creepage path length without significantly increasing the device's planar footprint, thus maintaining compactness while improving safety distance.
2Volume of moving object
If insulating materials are placed extremely closer to each other to minimize device size, then device compactness is improved, but electric polarization increases causing safety hazards
Solution Approach 1:
The patent introduces the plastic package body as an intermediary insulating structure between the leads. The plastic extension portions of the package body are strategically positioned to increase the insulation distance between the inner lead and outer leads. This intermediary insulating material prevents direct electric field interaction between adjacent leads, reducing electric polarization effects while maintaining compact device dimensions.
3Reliability
If creepage distance is increased to prevent creepage phenomenon, then electrical safety is improved, but device size increases
Solution Approach 1:
The patent applies local quality by differentiating the spacing between different lead pairs. The distance between outer leads is made smaller than the distance between inner and outer leads. This localized variation in spacing allows the device to minimize overall size while ensuring adequate creepage distance specifically where needed (between inner lead and outer leads), thereby achieving electrical safety without excessive device expansion.
Data Source
AI summary
The present invention relates generally to a semiconductor device and, more specifically, to optimizing the creep-age distance of the power semiconductor device and a preparation method thereof. The power semiconductor device includes a chip mounting unit with a die paddle and a plurality of leads arraged side by side located close to one side edge of the die paddle in a non-equidistant manner, a semiconductor chip attached on the die paddle, and a plastic packaging body covering the die paddle, the semiconductor chip, where the plastic packing body includes a plastic extension portion covering at least a part of a lead shoulder of a lead to obtain better electrical safety distance between the terminals of the semiconductor device, thus voltage creep-age distance of the device is increased.