Semiconductor Light Emitting Device Depth Dimension Luminance
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Solution Overview
Problem
Conventional semiconductor light emitting devices face challenges in downsizing while maintaining high luminance, as increasing light emission intensity typically requires expanding the light extraction surface area.
Innovation Solution
A semiconductor light emitting device structure incorporating a semiconductor stacked layer with a light transmissive light guide member and a light reflective member, surrounded by a light reflective package with an open portion corresponding to the light extraction surface, allowing for increased light emission intensity without expanding the light extraction surface area, achieved through a manufacturing method involving a light guide member and insulating package arrangement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the light extraction surface area is increased to achieve high luminance, then the luminance is improved, but the device size increases
Solution Approach 1:
The patent utilizes the depth dimension by forming an inverted pyramid structure within the semiconductor stacked layer. This allows light to be emitted and reflected through multiple internal reflections along the depth direction, effectively increasing the light extraction efficiency without expanding the planar surface area of the device.
Solution Approach 2:
The semiconductor stacked layer is divided into multiple layers including light emitting layers, cladding layers, and the inverted pyramid structure. This segmentation allows each layer to perform specific functions - light generation, light guidance, and light extraction - thereby achieving high luminance through optimized light management rather than simply increasing surface area.
2Illumination intensity
If the light extraction surface area is increased to enhance light emission intensity, then the light emission intensity is improved, but the device complexity increases
Solution Approach 1:
The patent combines multiple functions into a single integrated structure. The inverted pyramid structure serves simultaneously as a light extraction enhancement feature, a structural element, and a means to achieve high luminance. This merging approach avoids the need for separate components that would increase device complexity.
Solution Approach 2:
The inverted pyramid structure is nested within the semiconductor stacked layer, with the light emitting layers and cladding layers arranged concentrically around the pyramid. This nested configuration allows efficient use of vertical space and achieves high light emission intensity without requiring additional external components or complex lateral arrangements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables thickness reduction and high luminance by increasing the light emission area in the depth direction while maintaining the size of the light extraction surface, thereby enhancing luminous flux without increasing the extraction surface area.
Implementation Method 1
a light transmissive light guide member disposed on the semiconductor stacked layer
Implementation Method 2
a light reflective member disposed on the light guide member
Implementation Method 3
a light reflective package that has an open portion corresponding to the light extraction surface and surrounds peripheral surfaces of the semiconductor stacked layer
Data Source
AI summary
Provided is a semiconductor light emitting device 1 includes a semiconductor stacked layer 2 having a light extraction surface 3a perpendicular to a stacked surface of the semiconductor stacked layer 2, a light transmissive light guide member 3 disposed on the semiconductor stacked layer 2, a light reflective member 4 disposed on the light guide member 3, and a light reflective package 5 which has an open portion corresponding to the light extraction surface 3a and surrounds peripheral surfaces of the semiconductor stacked layer 2.