Semiconductor Light Emitting Device Pillar Structure

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor light emitting devices face challenges in achieving high energy conversion efficiency and stable light output at high current densities due to light absorption by ITO films and hydrogen incorporation in p-type semiconductor layers, which reduces luminous efficiency and increases forward voltage.

Innovation Solution

A semiconductor light emitting device with a pillar-shaped semiconductor layer structure, where a buried semiconductor layer and part of the tunnel junction layer are removed to expose the p-type semiconductor layer, preventing hydrogen incorporation and improving activation rates, and an inner or outer surface protection layer made of nitride semiconductor material with Al is used to enhance crystal quality and external quantum efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a transparent conductive film such as ITO is formed on the shell for current injection, then current injection is enabled, but light absorption occurs and external quantum efficiency is lowered

Engineering Contradiction:
Improvecurrent injectionVSAvoidlight absorption
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent extracts the harmful ITO transparent conductive film from the device structure and replaces it with a semiconductor-based current injection structure consisting of a p-type semiconductor layer and tunnel junction layer. This eliminates the light absorption problem caused by ITO while maintaining current injection functionality through the semiconductor layers.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the material parameters from transparent conductive oxide (ITO) to semiconductor materials with different optical and electrical properties. The p-type semiconductor layer and tunnel junction layer provide both current injection capability and optical transparency, resolving the contradiction between electrical functionality and optical performance.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If a p-type semiconductor layer is formed and activated by heat treatment, then current injection is improved, but hydrogen incorporation occurs during regrowth that inactivates the layer

Engineering Contradiction:
Improvecurrent injectionVSAvoidactivation rate
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent performs preliminary activation of the p-type semiconductor layer by heat treatment before the buried semiconductor layer regrowth. This preliminary action ensures the p-type layer is activated early, and subsequent process conditions are controlled to prevent hydrogen incorporation that would inactivate it during regrowth.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs an inert atmosphere or controlled environment during the regrowth process to prevent hydrogen incorporation from ammonia-based nitrogen raw materials. By controlling the growth environment, the activated p-type semiconductor layer is protected from inactivation.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

3Productivity

If high heat is used to grow the nanowire core and manufacture subsequent layers, then crystal growth is enabled, but surface quality deteriorates and crystal quality is lowered

Engineering Contradiction:
Improvecrystal growthVSAvoidcrystal quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the crystal growth process into multiple stages with different temperature conditions. The nanowire core is grown at high temperature to enable crystal formation, while subsequent layers including the active layer are grown at lower temperatures to preserve surface and crystal quality. This temporal and spatial segmentation of growth conditions resolves the contradiction between growth enablement and quality preservation.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution improves the activation rate of the p-type semiconductor layer and crystal quality of the active layer, leading to enhanced external quantum efficiency and reduced light absorption, resulting in improved luminous efficiency and stable light output at high current densities.

Implementation Method 1

an inner surface protection layer made of a nitride semiconductor material containing Al is provided on an inner side of the active layer... the point defects generated in the n-type nanowire layer are suppressed from propagating to the active layer

Methodology Applied
Scientific EffectDefect suppression:

Implementation Method 2

the buried semiconductor layer and a part of the tunnel junction layer are removed in the removed region... Hydrogen contained in ammonia of a nitrogen raw material gas used for growth of the buried semiconductor layer may be incorporated into the p-type semiconductor layer

Methodology Applied
Scientific EffectHydrogen incorporation prevention:

Data Source

PatentUS11462659B2Semiconductor light emitting device and manufacturing method of semiconductor light emitting device
Publication Date: 2022.10.04 KOITO MFG CO LTD
  • US11462659B2 patent drawing
  • US11462659B2 patent drawing
  • US11462659B2 patent drawing

AI summary

Provided is a semiconductor light emitting device including a growth substrate; a pillar-shaped semiconductor layer formed on the growth substrate; and a buried semiconductor layer formed to cover the pillar-shaped semiconductor layer, wherein the pillar-shaped semiconductor layer has an n-type nanowire layer formed at a center, an active layer formed on an outermore side than the n-type nanowire layer, a p-type semiconductor layer formed on an outermore side than the active layer and a tunnel junction layer formed on an outermore side than the p-type semiconductor layer, and wherein at least a part of the pillar-shaped semiconductor layer is provided with a removed region formed by removing from the buried semiconductor layer to a part of the tunnel junction layer.