Semiconductor Light-Receiving Device Electric Field Constriction
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Solution Overview
Problem
Back-side illuminated semiconductor light-receiving devices face challenges in achieving high-speed response due to increased parasitic capacitance and leakage currents caused by concentrated electric fields at the corners of the etched n-type conductive layer, which deteriorate the device's performance.
Innovation Solution
A semiconductor light-receiving device is designed with a p-type conductive layer on the substrate side, featuring a p-type conductive region in the n-type window layer that does not reach the multiplication layer or any external power-supplied electrode, reducing electric field intensity and leakage currents by constraining the electric field to the lower part of the n-type conductive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the n-type conductive layer is etched to constrict the electric field, then the electric field is concentrated at the corner portions, but this causes leakage current and device deterioration
Solution Approach 1:
A p-type conductive region is introduced as an intermediary element between the etched n-type conductive layer and the multiplication layer. This p-type region serves as a mediator that redistributes the electric field, preventing direct concentration at the corner portions of the etched structure while maintaining the electric field constriction effect in the active region.
Solution Approach 2:
The p-type conductive region is selectively formed only in specific areas where electric field concentration occurs at the corner portions, creating local quality variation. This allows the electric field to be constrained in the central active region while being redistributed in the peripheral corner regions, preventing leakage current without compromising overall device performance.
2Speed
If the thickness of the n-type window layer is increased to reduce parasitic capacitance, then high-speed response is improved, but the electric field intensity at corner portions increases
Solution Approach 1:
The p-type conductive region acts as an intermediary that decouples the relationship between window layer thickness and corner electric field intensity. By introducing this intermediate structure, the device can achieve high-speed response through increased window layer thickness without suffering from excessive electric field concentration at the corners.
3Ease of manufacture
If the PN junction size is increased to improve mountability and light alignment, then ease of manufacture is improved, but the device capacity increases and time constant increases
Solution Approach 1:
The device structure is segmented into distinct functional regions: a central active region with constrained electric field for high-speed response, and peripheral regions with p-type conductive structures for electric field redistribution. This segmentation allows the PN junction to be sized for ease of manufacture while maintaining high-speed response characteristics in the critical active region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances high-speed response and reduces device deterioration by distributing the electric field vertically and reducing the intensity at the corners, allowing for a thicker n-type window layer without compromising performance.
Implementation Method 1
a multiplication layer producing avalanche multiplication
Implementation Method 2
obtaining this electric field constriction effect requires a reduction in the thickness of the layer in the lower part of the etched n-type conductive layer
Implementation Method 3
a light absorption layer having a smaller bandgap than that of incident light
Data Source
AI summary
A semiconductor light-receiving device includes: a substrate; a p-type conductive layer, a light absorption layer having a smaller bandgap than that of incident light, a multiplication layer producing avalanche multiplication, and an n-type window layer laminated in that order on the substrate; an n-type conductive layer in a region of part of the n-type window layer; and a first p-type conductive region in a region of the n-type window layer that is not in contact with the n-type conductive layer, wherein the first p-type conductive region does not reach the multiplication layer and is not in contact with any electrode to which power is supplied from outside.