Semiconductor Logic Element Segmentation for Low Power
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Solution Overview
Problem
Traditional complementary binary logic (CCIS) faces issues such as vulnerability to defects, limited binary logic potential level pairs, high manufacturing complexity, and power consumption due to leakage, particularly in mixed mode chips, and is restricted to specific semiconductor materials requiring high-quality insulator semiconductor interfaces.
Innovation Solution
A semiconductor logic element comprising a field effect transistor configuration with an internal node formed by the drain of one FET and the gate of another, allowing for low power consumption and reduced vulnerability to defects, enabling multiple logic level pairs and improved manufacturing flexibility by eliminating the need for a high-quality insulator semiconductor interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional complementary binary logic (CCIS) is used, then logic operations can be performed, but power consumption occurs due to leakage currents
Solution Approach 1:
The logic element is segmented into two separate FETs (first and second FETs) with distinct conductivity types, where each FET handles one logic level. This segmentation isolates defect propagation and eliminates leakage currents between different logic levels, resolving the contradiction between energy loss and reliability.
Solution Approach 2:
A third FET is introduced as an intermediary element to control the connection between the first and second FETs. This intermediary FET prevents direct leakage paths while maintaining logical functionality, thereby reducing power consumption without compromising the reliability of the logic operation.
2Reliability
If traditional CCIS logic elements are used, then binary logic operations are enabled, but the system is vulnerable to defects forming conductive paths between nodes at different potentials
Solution Approach 1:
The logic element is divided into multiple FETs with isolated potential domains. Each FET operates at a specific potential level, and defects cannot form conductive paths between nodes at different potentials because the segmented structure prevents such paths, thereby improving reliability without significantly increasing complexity.
Solution Approach 2:
The invention uses simple FET structures that can be easily manufactured and replaced if needed. The segmented architecture with isolated potential domains ensures that even if one FET fails, the overall logic element remains functional, providing a cost-effective solution to defect vulnerability.
3Loss of energy
If traditional CCIS logic is used, then low steady state power consumption is achieved, but manufacturing complexity increases and compatibility with various semiconductor materials is limited
Solution Approach 1:
The logic element design using FETs with isolated potential domains is universal and can be implemented with various semiconductor materials (silicon, GaAs, SiGe, etc.) without requiring high-quality insulator-semiconductor interfaces. This multi-material compatibility simplifies manufacturing while maintaining low steady state power consumption.
Solution Approach 2:
The invention changes the fundamental operating parameters by eliminating the requirement for high-quality insulator-semiconductor interfaces and fixed logic levels. By allowing flexible potential assignments and using FETs with different conductivity types, the design achieves low power consumption with simplified manufacturing processes and broader material compatibility.
4Adaptability or versatility
If traditional CCIS logic elements are used, then logic operations are performed, but the system is restricted to specific semiconductor materials requiring high-quality insulator semiconductor interfaces
Solution Approach 1:
The FET-based logic element design is universally applicable to various semiconductor materials including silicon, GaAs, SiGe, and others. By eliminating the requirement for high-quality insulator-semiconductor interfaces and using isolated potential domains, the invention achieves broad material compatibility without compromising manufacturing precision requirements.
Solution Approach 2:
The design uses simple FET structures that can be manufactured with standard processes for various semiconductor materials. The isolated potential domain architecture eliminates the need for precise interface control, thereby reducing manufacturing precision requirements while expanding adaptability to different materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low steady-state power consumption, enhanced defect isolation, and increased flexibility in logic level pairs, reducing manufacturing complexity and expanding compatibility with various semiconductor materials, while maintaining low power usage and high operational reliability.
Implementation Method 1
a field effect transistor of the first conductivity type and a field effect transistor of the second conductivity type... when the input is at the first input logic potential, a conductive channel comprising mobile first conductivity type charge carriers is established between the source of the first FET and the drain of the first FET... when the input is at the second input logic potential, the channel between the source of the first FET and the drain of the first FET is arranged to be in a nonconductive state
Data Source
AI summary
Disclosed is a semiconductor logic element including a field effect transistor of the first conductivity type and a field effect transistor of the second conductivity type. A gate of the first FET is an input of the semiconductor logic element, a drain of the second FET is referred to as the output of the semiconductor logic element and a source of the second FET is the source of the semiconductor logic element. By applying applicable potentials to the terminals of the field effect transistors it is possible to influence the state of the output of the logic element. Also disclosed are different kinds of logic circuitries including the described logic element.