Semiconductor Device With Low Resistivity Region For Schottky Barrier Diode
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Solution Overview
Problem
Existing semiconductor devices with mixed Schottky and pn junctions face challenges in balancing forward voltage and leak current characteristics, particularly in suppressing reverse voltage-induced leak currents and improving breakdown voltage.
Innovation Solution
A semiconductor device configuration featuring a first n-type semiconductor layer, p-type second semiconductor regions, and a p-type third semiconductor region acting as a guard ring, with a Schottky junction electrode and a low resistivity region between the second and first semiconductor regions, which reduces the on-resistance of the Schottky barrier diode and suppresses inversion layer formation under reverse bias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a reverse voltage is applied in MPS, pinch-off of depletion layers spreading from each p-type semiconductor region occurs at a low voltage, then electric field increase at the Schottky barrier junction portion is suppressed and a leak current is suppressed, but forward voltage increases due to higher on-resistance
Solution Approach 1:
The patent introduces a low resistivity region (second portion) with different electrical properties located specifically between the p-type semiconductor regions and between the first n-type semiconductor layer and the first major surface. This local modification reduces on-resistance in critical areas without affecting the overall pinch-off mechanism, thereby reducing forward voltage while maintaining leak current suppression.
Solution Approach 2:
The patent changes the resistivity parameter by introducing a second portion with lower resistivity than the first n-type semiconductor layer. This parameter modification allows the device to achieve lower on-resistance and reduced forward voltage while preserving the depletion layer pinch-off effect that suppresses leak current.
2Power
If the on-resistance of the Schottky barrier diode is reduced to decrease forward voltage, then the breakdown voltage may be compromised and leak current suppression may be weakened
Solution Approach 1:
The low resistivity region is strategically positioned to reduce on-resistance where it most impacts forward voltage, while the p-type third semiconductor region (guard ring) is positioned to maintain breakdown voltage by controlling electric field distribution at critical interfaces, preventing premature breakdown.
Solution Approach 2:
The p-type third semiconductor region acts as a guard ring that mediates between the low resistivity region and the Schottky barrier junction, preventing inversion layer formation at the interface between the low resistivity region and the first n-type semiconductor layer, thereby protecting breakdown voltage while allowing on-resistance reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively decreases forward voltage, suppresses reverse bias leak current, and enhances the breakdown voltage, improving the reliability and performance of the semiconductor device.
Implementation Method 1
a Schottky barrier metal contacting the n-type semiconductor region and the p-type semiconductor region
Implementation Method 2
pinch-off of depletion layers spreading from each p-type semiconductor region occurs at a low voltage. Herewith, electric field increase at the Schottky barrier junction portion is suppressed and a leak current is suppressed
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type and a first electrode. The second regions are provided separately on a first major surface side of the first layer. The third region is provided on the first major surface side of the first layer so as to surround the second regions. The first electrode is provided on the first layer and the second regions. The first layer has a first portion and a second portion. The second portion has a lower resistivity than the first portion. The second portion is provided between the second regions and between the first portion and the first major surface and is provided outside the third region and between the first portion and the first major surface.