Semiconductor Package Marking Visibility via Segmented Mold
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Solution Overview
Problem
In semiconductor device packages, especially package on package (PoP), the markings identifying manufacturer and product information are often obscured by molding material, making them difficult to read.
Innovation Solution
A semiconductor device package design where a mold is molded over the chip to protect its sides and expose the backside surface, with via openings and markings inscribed on the mold's surface between the chip and the openings, ensuring the markings are visible and accessible.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If molding material is spread on the chip surface during molding, then the chip is protected and securely mounted, but the markings on the chip become obscured and difficult to read
Solution Approach 1:
The patent divides the mold into two distinct regions: a marking region that exposes the chip surface with markings for readability, and a molding region that covers the chip for protection. This segmentation allows the mold to simultaneously provide protection while maintaining marking visibility.
Solution Approach 2:
The mold is designed with different local properties: the marking region has a first depth that exposes the chip markings for identification, while the molding region has a second depth that provides protective coverage. This local differentiation resolves the contradiction between protection and visibility.
2Loss of information
If markings are inscribed on the chip surface, then product identification is enabled, but the markings become obscured by molding material
Solution Approach 1:
The mold structure is segmented to create a marking region with reduced depth that exposes the inscribed markings on the chip surface, allowing product information to remain accessible while the rest of the chip is protected by the molding material.
Solution Approach 2:
The mold acts as an intermediary structure that selectively exposes the markings region while providing overall protection. The marking region serves as a mediator between the need for chip protection and the need for marking visibility.
3Reliability
If the entire chip surface is covered by molding material, then maximum protection is achieved, but markings and alignment features become invisible
Solution Approach 1:
The mold is segmented into a marking region with first depth and a molding region with second depth, creating an exposed area where markings can be detected and measured while maintaining overall chip protection through the covered molding region.
Data Source
AI summary
A semiconductor package includes a printed circuit board (PCB), a chip bonded to the PCB, a mold protecting the chip and exposing a backside surface of the chip, via openings extending in the mold to expose first contacts bonded to the PCB, and at least one first marking inscribed in a marking region of the mold between the backside surface of the chip and the vias. The mold has an exposed molded underfill (eMUF) structure covering the sides of the chip while exposing the backside surface of the chip. A PoP package includes a top package stacked on and electrically connected to the semiconductor package.