Semiconductor Test Membrane With Aperture Patterns for Micro-Bump Alignment

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Solution Overview

Problem

Existing semiconductor test methods face challenges in accurately testing electrical connections of micro bumps in stacked semiconductor devices without causing damage or misalignment, particularly due to the small size and susceptibility of these bumps to deformation.

Innovation Solution

A semiconductor test device comprising a membrane portion with aperture patterns and a holder portion, where the membrane portion includes metal thin film layers with insulating coatings and conductive thin film layers on the sides, allowing precise alignment and contact with micro bumps while minimizing damage through elastic and magnetic control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional test methods are used to test micro bumps, then testing can be performed, but damage to micro bumps and misalignment occur due to their small size and susceptibility to deformation

Engineering Contradiction:
Improvetesting reliabilityVSAvoiddamage to micro bumps
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs a flexible membrane structure with aperture patterns that can elastically deform to accommodate and contact micro bumps without causing damage. The thin film membrane allows controlled flexibility to match the size and susceptibility of micro bumps while maintaining testing capability

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The patent replaces conventional rigid mechanical contact methods with a magnetic field-based alignment and contact system. Magnetic fields are used to precisely position and control the contact between the membrane aperture patterns and micro bumps, eliminating mechanical misalignment and damage

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If conventional test methods are used to test micro bumps, then testing can be performed, but misalignment occurs during connection

Engineering Contradiction:
Improvealignment precisionVSAvoidoperation complexity
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The patent substitutes mechanical alignment methods with magnetic field-based positioning. Magnetic fields provide precise control over the alignment between the membrane aperture patterns and micro bumps, achieving high measurement precision without complex mechanical adjustment operations

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces magnetic fields as an intermediary between the testing system and micro bumps. This intermediary enables precise alignment and controlled contact without direct mechanical manipulation, simplifying the operation while improving alignment precision

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables reliable electrical connection testing of micro bumps in stacked semiconductor devices by preventing damage and ensuring accurate alignment, reducing defects and improving yield in semiconductor manufacturing.

Implementation Method 1

allowing precise alignment and contact with micro bumps while minimizing damage through elastic and magnetic control

Methodology Applied
Scientific EffectElasticity: Elasticity

Implementation Method 2

allowing precise alignment and contact with micro bumps while minimizing damage through elastic and magnetic control

Methodology Applied
Scientific EffectMagnetic force: Magnetic Field

Data Source

PatentUS20250306086A1Semiconductor test device and manufacturing method thereof
Publication Date: 2025.10.02 OLUM MATERIAL CORP
  • US20250306086A1 patent drawing
  • US20250306086A1 patent drawing
  • US20250306086A1 patent drawing

AI summary

The present invention relates to a manufacturing method of a semiconductor test device. A semiconductor test device according to one embodiment of the present invention, which is a semiconductor test device for testing an electrical connection of a semiconductor, may include: a first membrane portion including a plurality of first aperture patterns in a thickness direction; a second membrane portion connected to the first membrane portion and including a plurality of second aperture patterns in a thickness direction; and a holder portion including a hollow region and being connected to an edge of the first membrane portion.