Semiconductor Memory Device Asymmetrical Voltage-Current Characteristics
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Solution Overview
Problem
Conventional semiconductor memory devices cannot effectively operate memory cells with asymmetrical voltage-current characteristics that depend on the history of applied voltages, leading to issues with data storage and retrieval due to the butterfly state, which results in high resistance and loss of non-linearity, rendering them unsuitable for rewritable memory cells.
Innovation Solution
A semiconductor memory device with a memory cell array that utilizes memory cells with distinct states (reset, weak reset, set, and butterfly states) and employs a floating access method to manage these states, ensuring that memory cells are either in the reset or weak reset state for access operations, thereby preventing transitions to the butterfly state and maintaining high resistance for data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells with asymmetrical voltage-current characteristics are used, then data storage capacity and integration density are improved, but the device becomes unsuitable for conventional access operations and requires complex state management
Solution Approach 1:
The patent changes the operational parameters by introducing a floating access method that applies specific voltage conditions (Vbl=0V, Vwl=0V or Vbl=Vset, Vwl=0V) to transition memory cells between distinct resistance states. This allows the memory cells with asymmetrical characteristics to be accessed conventionally while maintaining their unique voltage-current properties for high-density storage
Solution Approach 2:
The patent implements dynamic state management where memory cells can transition between reset state (high resistance), weak reset state (higher resistance), and set state (low resistance) based on applied voltages. This dynamic control enables the memory system to adapt between different operational modes while maintaining compatibility with conventional access operations
2Reliability
If memory cells transition to butterfly state, then resistance increases and non-linearity is lost, but this renders the cells unsuitable for rewritable memory operations
Solution Approach 1:
The patent applies preliminary anti-action by using a floating access method that pre-establishes voltage conditions preventing transitions to the butterfly state. By maintaining Vbl=0V during operations and using controlled voltage pulses, the system proactively prevents the loss of non-linearity and ensures memory cells remain in suitable states for rewritable operations
Solution Approach 2:
The patent implements feedback through sense amplifier units that detect the resistance state of memory cells and provide signals to control circuits. This feedback mechanism allows the system to monitor and maintain memory cells in appropriate states (reset or weak reset) while preventing unwanted transitions to the butterfly state, ensuring both reliability and rewritability
3Ease of operation
If conventional access operations are applied to memory cells with voltage-history dependence, then operation simplicity is maintained, but data storage and retrieval become ineffective
Solution Approach 1:
The patent applies preliminary action by preparing memory cells in specific states (reset or weak reset) before access operations. The floating access method pre-establishes voltage conditions (Vbl=0V, Vwl=0V or Vbl=Vset, Vwl=0V) that ensure memory cells are in known states, making subsequent conventional access operations effective for data storage and retrieval
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient data storage with lower power consumption and higher capacity by ensuring memory cells remain in reset or weak reset states, preventing power-intensive transitions and maintaining data integrity through the history of applied voltages, thus enabling nonvolatile data storage.
Implementation Method 1
These memory cells include one that exhibits asymmetrical voltage-current characteristics depending on the history of applied voltages on the memory cell
Implementation Method 2
Variable resistance memories (ReRAM: Resistive RAM) and so forth, which can be easily formed in three dimensions, have received attention
Data Source
AI summary
A semiconductor memory device according to the embodiment comprises memory cells each having asymmetrical voltage-current characteristics, wherein the memory cell has a first state, and a second state and a third state of higher resistances than that in the first state, wherein the memory cell, (1) in the second state, makes a transition to the first state on application of a first voltage of the first polarity, (2) in the first state, makes a transition to the second state on application of a second voltage of the second polarity, (3) in the first state, makes a transition to the third state on application of a third voltage of the second polarity (the third voltage<the second voltage), and (4) in the third state, makes a transition to the first state on application of a fourth voltage of the first polarity (the fourth voltage<the first voltage).