Semiconductor Memory Write Fail Detection Using Bias Sensing
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Solution Overview
Problem
Existing semiconductor devices face challenges in detecting malfunctioning memory cells during write operations, leading to unreliable data storage and potential hard failures.
Innovation Solution
A semiconductor device and method that includes a sensing circuit to detect failed memory cells by comparing bias voltage levels with a reference voltage, allowing for the termination of write operations on failed cells and performing bad block handling based on accumulated failure information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a write operation is performed on a memory cell without detecting its health status first, then the write operation can be executed quickly, but the reliability of data storage deteriorates due to potential hard failures
Solution Approach 1:
The patent applies preliminary action by performing a pre-selection process before the main write operation. The control circuit first determines whether the memory cell is in a fail state by applying a selection voltage and sensing the resulting current. Only after this preliminary detection does the circuit proceed to the actual write operation, thereby preventing hard failures while maintaining efficient write performance for healthy cells.
Solution Approach 2:
The patent implements feedback through the sensing circuit that continuously monitors the current flowing through the memory cell during the pre-selection process. The control circuit uses this feedback information to determine whether the memory cell is operational or failed, and accordingly decides whether to proceed with the write operation or terminate it, thus ensuring reliability without unnecessary delays.
2Reliability
If a sensing process is added to detect failed memory cells during write operations, then the reliability of data storage is improved, but the device complexity increases
Solution Approach 1:
The patent merges the sensing function with the existing write operation circuitry. The sensing circuit shares the same current path and voltage application mechanism as the write operation, utilizing existing components like the word line, bit line, and current generation circuit. This integration allows fail detection without adding separate, complex sensing hardware, thus improving reliability while minimizing increased device complexity.
3Productivity
If write operations continue on potentially failed memory cells, then the productivity is maintained, but harmful factors increase due to hard failures and data corruption
Solution Approach 1:
The patent applies preliminary anti-action by detecting the fail state of memory cells before they are used for write operations. The control circuit proactively identifies cells in the fail state through the pre-selection sensing process and prevents write operations from being performed on them, thereby counteracting the potential harmful effects of hard failures and data corruption before they can occur.
Solution Approach 2:
The patent implements skipping by rapidly identifying and excluding failed memory cells from the write operation sequence. Through efficient pre-selection sensing, the control circuit quickly determines which cells are operational and which are failed, then skips the write operation for failed cells while maintaining continuous processing for healthy cells, thus minimizing productivity impact while eliminating harmful failures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves the reliability of data storage by preventing write operations on failed memory cells and managing bad blocks effectively, ensuring consistent performance and data integrity.
Implementation Method 1
a sensing circuit configured to generate a sensing result signal by sensing a voltage level of the negative bias voltage after the start of the write operation
Data Source
AI summary
An operating method of a semiconductor device may include a write command reception step of receiving a write command, a pre-selection result determination step of determining whether a memory cell in which data are to be stored is a fail, and a write operation completion step of storing the data in the memory cell normally when the memory cell is determined to be normal.