Semiconductor Memory Capacitor Z-X Extension
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high integration of memory cells while minimizing bit cost, particularly in reducing the surface area occupied by capacitive elements while maintaining capacitance.
Innovation Solution
The semiconductor memory device incorporates a capacitive element with conductive members extending in a Z-X direction, reducing the occupied surface area while increasing capacitance per unit area, and a manufacturing method that forms the capacitive element simultaneously with contact plugs, reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the capacitive element is designed with conventional planar structure, then the manufacturing process is simple, but the surface area occupied by the capacitive element is large
Solution Approach 1:
The capacitive element transitions from a conventional planar structure to a three-dimensional structure by extending conductive members in the Z-direction (vertical dimension) in addition to the X and Y directions. This dimensional extension allows the capacitive element to achieve required capacitance with a smaller footprint on the substrate surface, thereby reducing the occupied surface area while maintaining manufacturability through established semiconductor fabrication processes.
2Quantity of substance
If the capacitive element occupies large surface area, then the capacitance is sufficient, but the integration density of memory cells is reduced
Solution Approach 1:
The patent employs three-dimensional configuration of conductive members extending in multiple directions (X, Y, and Z directions) to increase the effective capacitance-generating volume without proportionally increasing the surface footprint. This allows sufficient capacitance to be achieved within a compact area, thereby improving integration density while maintaining required electrical characteristics.
Solution Approach 2:
The conductive members are arranged in a nested or overlapping configuration where multiple conductive structures are positioned in close proximity and partially overlap in three-dimensional space. This nesting arrangement maximizes the effective capacitance within a confined volume, enabling high capacitance density without occupying excessive surface area.
3Manufacturing precision
If the capacitive element is manufactured separately from contact plugs, then the manufacturing precision can be optimized, but the manufacturing cost increases
Solution Approach 1:
The manufacturing process merges the formation of capacitive elements and contact plugs into a single integrated process sequence. Both structures are formed simultaneously through coordinated patterning and material deposition steps, eliminating the need for separate manufacturing operations. This integration maintains manufacturing precision through unified process control while reducing overall manufacturing cost by consolidating process steps and reducing equipment utilization time.
Data Source
AI summary
According to one embodiment a semiconductor memory device includes a first stacked body, a pillar, a memory film, a capacitive element, a first wiring, and a second wiring. The capacitive element includes a first conductive member and a second conductive member. A first length of the first conductive member in a first direction is larger than a second length of the first conductive member in a second direction crossing the first direction. A third length of the first conductive member in a third direction crossing the first direction and the second direction is larger than the second length. A fourth length of the second conductive member in the first direction is larger than a fifth length of the second conductive member in the second direction. A sixth length of the second conductive member in the third direction is larger than the fifth length.