Semiconductor Memory With Common Source Layer
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Solution Overview
Problem
Current semiconductor memory technologies face challenges in reducing the minimum design rule for higher integration and larger capacity, as they require advanced machining techniques and result in increased costs and chip area due to the stacking of memory cells, leading to inefficiencies in driver transistors and chip area usage.
Innovation Solution
A nonvolatile semiconductor memory design featuring a plurality of memory devices with resistance change elements and diodes, where a source conductive layer spreads two-dimensionally to connect memory devices, reducing the effective area required for each memory device and optimizing the arrangement of word lines, bit lines, and source lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked three-dimensionally to increase integration degree, then memory capacity is improved, but chip area increases due to additional driver transistors
Solution Approach 1:
The patent merges the source line function across multiple stacks by implementing a common source conductive layer that serves all memory device stacks simultaneously. This consolidation eliminates the need for separate source lines and driver transistors for each stack, thereby increasing memory capacity while preventing proportional increases in chip area and driver transistor count.
Solution Approach 2:
The common source conductive layer performs a universal function across multiple memory device stacks, acting as a shared source line for all stacks. This multi-functional approach allows the same conductive structure to serve multiple purposes (connecting multiple stacks), thus improving integration without proportionally increasing chip area.
2Quantity of substance
If the number of memory device stacks is increased to enhance integration, then memory capacity is improved, but the number of driver transistors increases
Solution Approach 1:
The patent merges the driver transistor functions across multiple stacks by implementing a common source conductive layer that eliminates the need for separate driver transistors for each stack. This consolidation allows memory capacity to scale with the number of stacks while keeping the driver transistor count constant, thereby reducing overall device complexity.
3Manufacturing precision
If advanced machining techniques are used to reduce minimum design rule, then integration degree is improved, but manufacturing cost increases
Solution Approach 1:
The common source conductive layer serves multiple memory device stacks simultaneously, reducing the overall number of conductive structures and interconnections required. This multi-functional design simplifies the manufacturing process by reducing the number of patterning and deposition steps needed, thereby lowering manufacturing costs while still achieving high integration through multiple stacks.
Data Source
AI summary
According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory including: a plurality of memory devices each having: a resistance change element, and a diode connected serially to the resistance change element; and a source conductive layer spreading two-dimensionally to be connected to one ends of the plurality of memory devices.