Semiconductor Memory Device Conductive Layer for Arc Suppression
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Solution Overview
Problem
In the manufacturing of semiconductor memory devices, existing technologies face challenges in suppressing arcing during high aspect ratio etching processes and hydrogen infiltration into peripheral circuits, leading to yield reduction and increased manufacturing costs.
Innovation Solution
The semiconductor memory device incorporates sealing members and conductive portions that provide dual discharge paths to manage electric charges and hydrogen barriers, ensuring effective discharge of charges and preventing hydrogen infiltration, thereby improving yield and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high aspect ratio etching is performed to manufacture semiconductor memory devices, then manufacturing precision is improved, but arcing occurs leading to yield reduction
Solution Approach 1:
A conductive layer is introduced as an intermediary component between the etching process and the substrate. This conductive layer serves as a charge discharge path that mediates the electrical charges generated during high aspect ratio etching, preventing arcing while maintaining etching precision. The conductive layer is specifically positioned to provide charge dissipation without interfering with the etching process.
2Object-affected harmful factors
If conventional sealing structures are used, then hydrogen barrier function is provided, but manufacturing complexity increases
Solution Approach 1:
The conductive layer is designed to perform multiple functions simultaneously: it serves as both a charge discharge path during etching and as a hydrogen barrier layer. By integrating these two functions into a single structural element, the patent eliminates the need for separate sealing structures, thereby reducing manufacturing complexity while maintaining hydrogen barrier performance.
Solution Approach 2:
The patent merges the charge discharge function and hydrogen barrier function into a single integrated structure. The conductive layer is formed to provide both electrical charge dissipation pathways and hydrogen diffusion barriers, combining previously separate functions into one component to simplify the overall device structure and manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses arcing and hydrogen infiltration, enhancing the yield and reliability of semiconductor memory devices while minimizing manufacturing costs by utilizing dual discharge paths and hydrogen barriers.
Implementation Method 1
a conductive portion DP provided on a bevel portion of the wafer W. The conductive portion DP includes a discharge path to the semiconductor substrate W
Implementation Method 2
hydrogen barrier, ensuring effective discharge of charges and preventing hydrogen infiltration
Data Source
AI summary
A semiconductor memory device according to an embodiment includes a substrate, a source line, word lines, a pillar, an outer peripheral conductive layer, a lower layer conductive layer, and a first contact. The substrate includes a core region and a first region.The outer peripheral conductive layer is provided to surround the core region in the first region. The outer peripheral conductive layer is included in a first layer. The lower layer conductive layer is provided in the first region. The first contact is provided on the lower layer conductive layer to surround the core region in the first region. An upper end of the first contact is included in the first layer. The first contact is electrically connected to the outer peripheral conductive layer.