Semiconductor Memory with Volatile-Nonvolatile Data Transfer

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Solution Overview

Problem

Current semiconductor memory devices either lose data when power is discontinued (volatile memory) or operate slowly and are larger in size (non-volatile memory), lacking a universal solution that combines fast operation with data retention.

Innovation Solution

A semiconductor memory device with both volatile and non-volatile modes, utilizing floating bodies for volatile memory and floating gates or trapping layers for non-volatile memory, enabling data transfer between modes through a parallel, non-algorithmic process, allowing data to be retained when power is interrupted and restored.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-volatile memory devices are used to retain data without power, then data retention capability is improved, but operation speed deteriorates

Engineering Contradiction:
Improvedata retention capabilityVSAvoidoperation speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The memory device is segmented into two distinct memory types: volatile memory for fast operations and non-volatile memory for data retention. This segmentation allows each memory type to operate in its optimal performance regime without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines volatile and non-volatile memory into a single integrated device, enabling the system to leverage both fast access speeds and data retention capabilities simultaneously through unified control mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If non-volatile memory devices are used to retain data without power, then data retention capability is improved, but device size increases

Engineering Contradiction:
Improvedata retention capabilityVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

By merging volatile and non-volatile memory functions into a single integrated device, the patent achieves data retention without requiring separate storage components, thereby avoiding the size increase that would result from using standalone non-volatile memory devices.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated memory device performs multiple functions (fast access and data retention) within a single universal structure, eliminating the need for additional dedicated non-volatile memory components and reducing overall device footprint.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If volatile memory is used for fast operation, then operation speed is improved, but data retention capability deteriorates

Engineering Contradiction:
Improveoperation speedVSAvoiddata retention capability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The memory system is divided into volatile memory for speed-critical operations and non-volatile memory for retention-critical data, allowing each segment to be optimized for its specific function while working together as a unified system.

Inventive Principle:
Principle #1Segmentation

4Adaptability or versatility

If a universal memory device combining both modes is created, then versatility is improved, but device complexity increases

Engineering Contradiction:
Improvememory mode versatilityVSAvoiddevice structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges volatile and non-volatile memory structures into an integrated device with shared control logic, achieving versatility while managing complexity through unified design rather than separate independent systems.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11862245B2Semiconductor memory having both volatile and non-volatile functionality and method of operating
Publication Date: 2024.01.02 ZENO SEMICONDUCTOR INC
  • US11862245B2 patent drawing
  • US11862245B2 patent drawing
  • US11862245B2 patent drawing

AI summary

Semiconductor memory having both volatile and non-volatile modes and methods of operation. A semiconductor storage device includes a plurality of memory cells each having a floating body for storing, reading and writing data as volatile memory. The device includes a floating gate or trapping layer for storing data as non-volatile memory, the device operating as volatile memory when power is applied to the device, and the device storing data from the volatile memory as non-volatile memory when power to the device is interrupted.