Semiconductor Memory Device Dummy Word Line Test Control

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Solution Overview

Problem

Conventional semiconductor memory devices face challenges in performing effective test operations for defects in bit line contacts and storage node contacts due to difficulties in isolating and testing individual word lines without interfering with normal operations.

Innovation Solution

A semiconductor memory device and method that utilize a dummy word line and normal word lines, with a test control unit generating signals to enable the dummy word line for writing test data and subsequently the normal word lines for testing, allowing for independent evaluation of memory cells without requiring external write commands, thereby improving test efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional test operation is performed using one word line to write data and use it to test other word lines, then test coverage is improved, but the initial word line cannot be tested and test completeness deteriorates

Engineering Contradiction:
Improvetest coverageVSAvoidtest completeness
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The word line set is segmented into a dummy word line and normal word lines. The dummy word line is specifically designated for writing test data, while normal word lines are used for both writing and testing. This segmentation allows the testing function to be separated from the writing function, enabling all normal word lines to be tested while the dummy word line serves as a dedicated test data source.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dummy word line acts as an intermediary element that writes test data to memory cells, which are then used to test the normal word lines. This intermediary structure allows the test operation to proceed without requiring external write commands for each normal word line, while still enabling comprehensive testing of all normal word lines.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If external write commands are used during normal operations, then data writing is performed, but test operation efficiency deteriorates due to inability to perform independent testing

Engineering Contradiction:
Improveoperational efficiencyVSAvoidtest time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The dummy word line performs preliminary action by writing test data to memory cells in advance. This pre-written test data is then used to test all normal word lines without requiring external write commands during the actual test operation, thereby reducing test time and improving test operation efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy word line provides self-service functionality by autonomously writing test data that serves the testing needs of all normal word lines. This self-generated test data eliminates the need for external intervention and write commands during testing, allowing the system to perform independent and efficient testing.

Inventive Principle:
Principle #25Self-service

3Reliability

If all word lines are tested independently without a dummy word line, then test completeness is improved, but test operation complexity increases due to need for external commands

Engineering Contradiction:
Improvetest completenessVSAvoidtest operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy word line serves as an intermediary that simplifies the test operation by providing pre-written test data. This intermediary structure reduces test operation complexity by eliminating the need for external write commands for each normal word line, while still enabling independent testing of all normal word lines through the use of the dummy word line's test data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9455049B2Semiconductor memory device and method of testing the same
Publication Date: 2016.09.27 SK HYNIX INC
  • US9455049B2 patent drawing
  • US9455049B2 patent drawing
  • US9455049B2 patent drawing

AI summary

A semiconductor memory device may include: a memory cell array including first and second word lines coupled to first and second memory cells, respectively; a word line driving unit suitable for selectively driving the first and second word lines; and a test control unit suitable for enabling the first word line to write test data to the first memory cell, and enabling the second word line to write the test data to the second memory cell, during a test operation.