Semiconductor Memory Access to Reclaim ECC-Reserved Cells
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Solution Overview
Problem
Existing memory devices face challenges in optimizing storage capacity and operational efficiency, particularly when error correction coding (ECC) functionality is enabled, as they often reserve a significant portion of memory array space for ECC parity bits, reducing user-accessible storage and introducing operational complexities.
Innovation Solution
A memory device design that allows the ECC functionality to be disabled, enabling the reserved memory cells to store user data or metadata, thereby increasing storage capacity by approximately 6% and allowing for flexible burst lengths to accommodate additional data, while maintaining ECC functionality when needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC functionality is enabled, then data reliability is improved, but storage capacity is reduced due to reserved memory cells for ECC parity bits
Solution Approach 1:
The memory device dynamically reconfigures the memory array based on operational mode. When ECC is disabled, the memory cells that would normally be reserved for ECC parity bits are made available for user data storage, increasing storage capacity. When ECC is enabled, these cells are reallocated to maintain error correction functionality, ensuring data reliability.
Solution Approach 2:
The system changes the functional parameter of specific memory cells based on the ECC enable/disable state. By altering the allocation parameter of memory cells from dedicated ECC storage to general user storage when ECC is disabled, the system optimizes storage capacity while maintaining the ability to provide error correction when needed.
2Reliability
If ECC functionality is enabled, then data reliability is improved, but device complexity is increased due to additional control mechanisms
Solution Approach 1:
The patent extracts the ECC functionality as an optional feature rather than a mandatory component. By allowing the ECC function to be disabled through control signals, the system can operate in a simplified mode without the complexity of error correction mechanisms, while still providing reliable storage when ECC is enabled.
3Reliability
If memory cells are reserved for ECC parity bits, then data reliability is improved, but storage capacity is reduced
Solution Approach 1:
The memory device dynamically reconfigures the memory array based on operational mode. When ECC is disabled, the memory cells that would normally be reserved for ECC parity bits are made available for user data storage, increasing storage capacity. When ECC is enabled, these cells are reallocated to maintain error correction functionality, ensuring data reliability.
Data Source
AI summary
Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.