Semiconductor Memory Electrode Films with Silicon and Tungsten

Solution Overview

Problem

The challenge in semiconductor memory devices is to reduce interconnect resistance while minimizing the amount of tungsten used, as excessive tungsten deposition leads to wafer warping and decreased process precision, and forming entirely silicon electrodes increases interconnect resistance, hindering operation speed.

Innovation Solution

A semiconductor memory device design featuring electrode films with a central silicon portion and peripheral tungsten portions, where the silicon pillars pierce both central and peripheral parts, reducing interconnect resistance and minimizing tungsten usage to prevent wafer warping and enhance manufacturing precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If metal interconnects are used to reduce interconnect resistance, then operation speed is improved, but wafer warping occurs and manufacturing precision decreases

Engineering Contradiction:

Improveoperation speedVSAvoidmanufacturing precision

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

The electrode film is divided into two regions with different materials: the central portion uses silicon to maintain wafer flatness and manufacturing precision, while the peripheral portion uses metal (tungsten) to reduce interconnect resistance. This local differentiation allows each region to optimize for its specific function without compromising the other.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The electrode film employs a composite structure combining silicon and metal (tungsten) in a single continuous layer. The central portion is made of silicon while the peripheral portion is made of metal, creating a composite material system that simultaneously achieves low resistance and wafer stability.

Inventive Principle:

Principle #40Composite materials

2Manufacturing precision

If entirely silicon electrodes are used to maintain wafer flatness, then manufacturing precision is maintained, but interconnect resistance increases

Engineering Contradiction:

Improvemanufacturing precisionVSAvoidoperation speed

Core Design Contradiction:

Manufacturing precisionVSSpeed

Solution Approach 1:

The electrode film is divided into two regions with different materials: the central portion uses silicon to maintain wafer flatness and manufacturing precision, while the peripheral portion uses metal (tungsten) to reduce interconnect resistance. This local differentiation allows each region to optimize for its specific function without compromising the other.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The electrode film employs a composite structure combining silicon and metal (tungsten) in a single continuous layer. The central portion is made of silicon while the peripheral portion is made of metal, creating a composite material system that simultaneously achieves low resistance and wafer stability.

Inventive Principle:

Principle #40Composite materials

3Speed

If excessive tungsten is deposited to reduce interconnect resistance, then operation speed is improved, but wafer warping increases and process precision decreases

Engineering Contradiction:

Improveoperation speedVSAvoidprocess precision

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

The electrode film is divided into two regions with different materials: the central portion uses silicon to maintain wafer flatness and manufacturing precision, while the peripheral portion uses metal (tungsten) to reduce interconnect resistance. This local differentiation allows each region to optimize for its specific function without compromising the other.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

Instead of depositing excessive tungsten throughout the entire electrode film, the metal is applied only to the peripheral portion where it is most needed for current conduction. This partial application of tungsten achieves the resistance reduction goal while avoiding the wafer warping that would result from excessive metal deposition across the whole structure.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS9704877B2Semiconductor memory device

Publication Date: 2017.07.11 KIOXIA CORP

AI summary

A semiconductor memory device includes a first stacked body, a semiconductor pillar extending the first direction and piercing the first stacked body, and a memory film disposed between the semiconductor pillar and the electrode film. The first stacked body includes a plurality of electrode films and a plurality of inter-layer insulating films stacked alternately along the first direction. The plurality of electrode films and the plurality of inter-layer insulating films extend in a second direction intersecting the first direction. Each of the electrode films includes a central portion and a peripheral portion. The central portion is disposed in a central part of the electrode film in a third direction, and includes silicon. The third direction intersects the first direction and the second direction. The peripheral portion is disposed on two sides of the central portion in the third direction, extends in the second direction and includes a metal.