Semiconductor Memory Gate Acute Angle Charge Injection

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Solution Overview

Problem

Current semiconductor devices with nonvolatile memory face challenges in achieving both improved reliability and performance, particularly in the design of memory cells with split-gate structures, where charge accumulation and retention are critical but often compromise on erase characteristics and retention.

Innovation Solution

A semiconductor device design featuring a stacked insulating film structure with a silicon nitride film as the charge accumulation layer, sandwiched between silicon oxide films, and a unique angle configuration of the memory gate electrode, which enhances charge injection and retention by concentrating the electric field at acute corners for efficient erase operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a silicon nitride film is used as the charge accumulation layer, then data retention reliability is improved, but the thickness of oxide films must be reduced which increases write and erase voltage requirements

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidwrite and erase voltage
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent employs a composite insulating film structure consisting of multiple layers including silicon oxide films and silicon nitride films with different band gaps. This composite structure allows the silicon nitride layer to accumulate charges for high reliability while the surrounding silicon oxide layers with greater band gaps provide electrical isolation and enable lower write/erase voltages by confining charges more effectively.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the band gap parameter by selecting materials with different band gap values for different layers. The silicon oxide films have greater band gaps than the silicon nitride film, creating a potential well that confines charges. This parameter variation allows simultaneous achievement of high data retention reliability and reduced write/erase voltage requirements.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the stacked insulating film structure is used with acute angle configuration, then charge injection efficiency is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecharge injection efficiencyVSAvoidangle configuration precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces asymmetry in the gate electrode configuration by forming acute angles at specific corners. This asymmetric geometry concentrates the electric field at the acute corner regions, enhancing charge injection efficiency during write and erase operations. The non-uniform angle distribution creates focused field regions that improve productivity despite increased manufacturing complexity.

Inventive Principle:
Principle #4Asymmetry

3Reliability

If the band gap of first and third insulating films is greater than the second insulating film, then charge retention is improved, but device complexity increases

Engineering Contradiction:
Improvecharge retentionVSAvoidinsulating film structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the insulating film into multiple distinct layers with different material compositions and band gap values. The first insulating film (silicon oxide), second insulating film (silicon nitride), and third insulating film (silicon oxide) are formed as separate layers through sequential deposition processes. This segmentation allows each layer to perform its specific function - charge confinement and accumulation - while maintaining manageable device complexity through standardized fabrication steps.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves data retention and erase performance by ensuring that the injection positions for write and erase operations are aligned, reducing variations in threshold voltage and enhancing overall reliability and performance of the nonvolatile memory.

Implementation Method 1

The second insulating film is an insulating film having a charge accumulation function

Methodology Applied
Scientific EffectCharge accumulation: Electrical Accumulator

Implementation Method 2

The band gap of each of the first insulating film and the third insulating film is greater than that of the second insulating film

Methodology Applied
Scientific EffectBand gap energy barrier: Potential Well

Implementation Method 3

an end portion of the lower surface of the second gate electrode on the side of the first gate electrode has an acute angle

Methodology Applied
Scientific EffectElectric field concentration: Electric Field

Data Source

PatentUS9406813B2Semiconductor device and method of manufacturing same
Publication Date: 2016.08.02 RENESAS ELECTRONICS CORP
  • US9406813B2 patent drawing
  • US9406813B2 patent drawing
  • US9406813B2 patent drawing

AI summary

To provide a semiconductor device with nonvolatile memory, having improved performance. A memory cell has control and memory gate electrodes on a semiconductor substrate via an insulating film and another insulating film having first, second, and third films stacked one after another in order of mention, respectively. The memory and control gate electrodes are adjacent to each other via the stacked insulating film. The second insulating film has a charge accumulation function. The first and third insulating films each have a band gap greater than that of the second insulating film. An inner angle of the second insulating film between a portion extending between the semiconductor substrate and the memory gate electrode and a portion extending between the control gate electrode and the memory gate electrode is ≧90°. An inner angle of the corner portion between the lower surface and the side surface of the memory gate electrode is <90°.