Semiconductor Memory Gate With Insulation Block For Integration Density
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Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high integration and electrical performance while minimizing device size, particularly in non-volatile memory technologies like SONOS structures, which require complex fabrication processes to enhance integrity and capacity.
Innovation Solution
A semiconductor device design featuring a memory gate overlapping a source region, electrically insulated from it, and connected to two charge storage structures, with an insulation block between the charge storage structures and the source region, allowing for device miniaturization and improved integrity through a specific manufacturing method involving select gates, charge storage structures, and oxidation processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory miniaturization is pursued to achieve high integration, then device capacity and integration density are improved, but fabrication process complexity increases and device integrity deteriorates
Solution Approach 1:
The patent merges the formation of the insulation block and charge storage structure into a single oxidation process step. The insulation block is formed by oxidizing the semiconductor substrate in the same process that forms the charge storage structure, eliminating separate fabrication steps and reducing overall process complexity while maintaining high integration density
Solution Approach 2:
The oxidation process serves multiple functions simultaneously: it forms the insulation block, creates the charge storage structure, and defines the interface between them. This multi-functionality reduces the number of process steps required and simplifies the fabrication sequence while achieving the desired high-density memory structure
2Productivity
If memory miniaturization is pursued to achieve high integration, then device capacity and integration density are improved, but device integrity deteriorates
Solution Approach 1:
The patent combines the insulation block formation with charge storage structure formation in a single oxidation step, ensuring that both structures are created under identical process conditions. This merging ensures consistent material properties and interface quality, maintaining device integrity while achieving miniaturization
Solution Approach 2:
The insulation block is formed preliminarily as part of the oxidation process before subsequent memory structure fabrication steps. This preliminary formation ensures that the insulation layer is already in place with proper electrical properties before additional processing, preventing integrity issues that could arise from later interface creation
3Reliability
If complex fabrication processes are used to enhance integrity and electrical performance, then device reliability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent merges multiple structure-forming operations into a single oxidation process, reducing the total number of fabrication steps. This merging maintains the electrical performance required for reliable memory operation while significantly simplifying the manufacturing process and reducing production complexity
Solution Approach 2:
The oxidation process self-organizes to form both the insulation block and charge storage structure with appropriate interfaces and properties. The process uses the semiconductor substrate itself as the starting material for the insulation block, eliminating the need for separate deposition or formation steps, thereby simplifying manufacturing while ensuring reliable electrical characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively shrinks device size and enhances integrity by allowing the memory gate to be connected to two charge storage structures, simplifying the manufacturing process and improving electrical performance.
Implementation Method 1
An insulation block is formed between the two charge storage structures and formed on the source region
Data Source
AI summary
A manufacturing method of a semiconductor device includes the following steps. A plurality of select gates are formed on a memory region of a semiconductor substrate. Two charge storage structures are formed between two adjacent select gates. A source region is formed in the semiconductor substrate, and the source region is formed between the two adjacent select gates. An insulation block is formed between the two charge storage structures and formed on the source region. A memory gate is formed on the insulation block, and the memory gate is connected to the two charge storage structures.