Semiconductor Memory Read Control With Word-Line Kick Voltage

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Solution Overview

Problem

Existing NAND type flash memory devices face challenges in efficiently reading data due to variations in threshold voltage distributions and data allocation, leading to inaccuracies in data interpretation.

Innovation Solution

The semiconductor memory device employs a kick voltage applied to the word line before the read voltage, along with specific voltage levels for the transistors, to enhance data reading accuracy by controlling the state of memory cell transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a read voltage is applied directly to the word line, then the reading operation can be performed, but data reading accuracy deteriorates due to threshold voltage variations and data allocation issues

Engineering Contradiction:
Improvedata reading accuracyVSAvoidvoltage control complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies a kick voltage to the word line before applying the read voltage. This preliminary action of applying kick voltage prepares the memory cell transistors by temporarily raising their threshold voltage, ensuring that only cells with threshold voltages below the kick voltage level are turned on during the subsequent read operation. This eliminates the need for complex voltage control schemes and directly addresses the accuracy issue caused by threshold voltage variations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameter applied to the word line by introducing a kick voltage level that is higher than the read voltage level. This parameter change allows the system to temporarily modify the threshold voltage condition of memory cell transistors, ensuring accurate data reading even in the presence of threshold voltage variations and data allocation challenges.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If threshold voltage variations are present in memory cells, then data can be stored, but data interpretation becomes inaccurate

Engineering Contradiction:
Improvedata storage capabilityVSAvoiddata interpretation accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The kick voltage is applied as a preliminary action before reading. This temporary voltage pulse raises the threshold voltage of all memory cell transistors above the kick voltage level. When the read voltage is subsequently applied, only cells with original threshold voltages below the kick voltage level are turned on, ensuring accurate data interpretation regardless of the original threshold voltage variations in the memory cells.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If multiple voltage levels are used for transistor control, then data reading accuracy improves, but the control mechanism becomes more complex

Engineering Contradiction:
Improvedata reading accuracyVSAvoidcontrol mechanism simplicity
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The control mechanism is simplified by using a preliminary kick voltage action followed by a single read voltage application. Instead of requiring complex multi-level voltage control throughout the reading process, the system applies kick voltage first to establish the correct threshold voltage conditions, then applies the read voltage once to complete the data reading operation. This maintains high accuracy while significantly simplifying the control mechanism.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12387799B2Semiconductor memory device
Publication Date: 2025.08.12 KIOXIA CORP
  • US12387799B2 patent drawing
  • US12387799B2 patent drawing
  • US12387799B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes first and second memory cells, a first word line, first and second sense amplifiers, first and second bit lines, a controller. The first and second sense amplifiers each include first and second transistors. The first bit line is connected between the first memory cell and the first transistor. The second bit line is connected between the second memory cell and the second transistor. In the read operation, the controller is configured to apply a kick voltage to the first word line before applying the read voltage to the first word line, and to apply a first voltage to a gate of the first transistor and a second voltage to a gate of the second transistor while applying the kick voltage to the first word line.