Semiconductor Memory Device Power Interruption Recovery
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Solution Overview
Problem
NOR flash memory experiences interrupted writing operations due to power supply voltage fluctuations, leading to data loss and the need for reinitialization upon voltage restoration, as its data register is volatile and cannot retain page data below a certain voltage threshold.
Innovation Solution
A semiconductor memory device integrating a NOR flash memory and a variable resistance memory, where a control unit detects power-off levels and writes unwritten data from the NOR flash memory into the variable resistance memory, allowing for data preservation and resumed writing upon power restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NOR flash memory uses a volatile data register to hold page data during writing, then the memory structure remains simple and cost-effective, but the data is lost when power supply voltage drops below the minimum operation voltage
Solution Approach 1:
The patent introduces a variable resistance memory array as an intermediary storage medium between the volatile data register and the NOR flash memory cell array. When power voltage drops, the unwritten page data is automatically transferred from the data register to the variable resistance memory array, which can retain data without power. This intermediary structure prevents data loss while maintaining the original simple NOR flash memory architecture for normal operations.
Solution Approach 2:
The patent implements a preliminary action by detecting power supply voltage drops before complete power loss occurs. The detection unit monitors voltage levels and triggers an automatic data transfer operation to the variable resistance memory array when voltage falls below the minimum operation threshold. This preliminary data preservation action occurs before the power interruption completes, preventing data loss without requiring host computer intervention.
2Reliability
If page writing is interrupted due to power supply voltage drop, then power consumption is reduced during the interruption, but writing operation must be restarted from the beginning after power restoration
Solution Approach 1:
The patent implements a feedback mechanism where the detection unit continuously monitors power supply voltage during writing operations. When voltage drops below the minimum operation voltage, the system automatically detects this condition and triggers a data preservation action by transferring unwritten page data to the variable resistance memory array. After power restoration, the system detects the voltage recovery and automatically resumes writing from the preserved data, creating a closed-loop feedback system that ensures writing continuity without host computer intervention.
Solution Approach 2:
The patent applies the discarding and recovering principle by temporarily discarding the normal writing path when power interruption occurs, and recovering the writing operation after power restoration. The unwritten page data is discarded from the volatile data register and recovered in the variable resistance memory array during power interruption. After power restoration, the data is recovered back to the writing pipeline, allowing the operation to continue from where it left off rather than restarting from the beginning.
3Reliability
If the host computer must restart page writing from the beginning after power restoration, then data integrity is ensured through verification, but productivity and writing efficiency are reduced
Solution Approach 1:
The patent implements self-service by enabling the NOR flash memory device to automatically handle power interruption recovery without host computer intervention. The detection unit automatically detects power supply anomalies, the control unit automatically transfers data to the variable resistance memory array, and upon power restoration, the system automatically resumes writing operations. This self-service capability maintains data integrity while preserving writing efficiency, as the host computer continues to receive normal write commands without needing to implement complex recovery protocols or restart operations manually.
Data Source
AI summary
A semiconductor memory device capable of automatically restoring writing interrupted due to a momentary stop or a fluctuation of a power supply voltage is provided. A non-volatile memory of the disclosure includes a memory cell array formed with a NOR array and a variable resistance array. When the power supply voltage drops to a power-off level during writing into the NOR array, a reading/writing control unit writes unwritten data into the variable resistance array. Subsequently, when a power-on of the power supply voltage is detected, the reading/writing control unit reads the unwritten data from the variable resistance array and writes the unwritten data into the NOR array, so that interrupted writing is restored.