Semiconductor Memory Repair Circuit Selection for Redundancy Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices with memory units face challenges in effectively repairing defective portions due to issues like defective preliminary memories or wiring troubles between redundancy target memories and preliminary memories, leading to incomplete redundancy repairs.
Innovation Solution
A semiconductor device design that allows for parallel selection of multiple repair circuits for each memory, using a holding circuit to control the selection of repair circuits based on selection information, ensuring redundancy repair effectiveness even when individual repair circuits or wiring patterns fail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single repair circuit is used for each memory, then the device complexity is reduced, but the reliability of redundancy repair deteriorates when the repair circuit or wiring is defective
Solution Approach 1:
The patent implements dynamic selection capability where the selection circuit can switch between multiple repair circuits based on their operational status. This allows the system to adapt to defective conditions by dynamically choosing alternative repair circuits, thereby maintaining high reliability without requiring all possible repair circuits to be permanently connected.
Solution Approach 2:
The patent divides the repair circuit selection into independent segments by providing separate selection circuits for each memory unit. Each selection circuit independently manages its own repair circuit choices, allowing localized failure isolation and maintaining overall system reliability while keeping individual circuit complexities manageable.
2Reliability
If multiple repair circuits are provided for each memory, then the redundancy repair reliability is improved, but the device complexity increases
Solution Approach 1:
The patent makes the selection circuits universal by designing them to handle multiple repair circuit selection tasks through a standardized architecture. Each selection circuit uses the same basic structure to manage different repair circuits, allowing the system to scale reliability without proportionally increasing complexity through circuit design innovation.
Solution Approach 2:
The patent changes the operational parameters of the selection circuits by enabling them to dynamically adjust their selection criteria based on real-time status information from repair circuits and wiring paths. This allows the system to optimize reliability by selecting the best available repair path without needing to physically reconfigure the entire circuit architecture.
3Adaptability or versatility
If a fixed wiring pattern is used between memory and repair circuit, then the manufacturing precision is improved, but the adaptability to defective conditions deteriorates
Solution Approach 1:
The patent transforms the fixed wiring pattern into a dynamic selection mechanism where the selection circuit determines which wiring path to activate based on the operational status of repair circuits. This allows the system to adapt to defective conditions by dynamically choosing alternative paths without requiring physically reconfigurable wiring, thus maintaining manufacturing precision while achieving adaptability.
4Reliability
If redundancy repair is attempted without checking repair circuit status, then the productivity is improved, but the reliability of repair deteriorates
Solution Approach 1:
The patent implements preliminary status checking of repair circuits and wiring paths before initiating the redundancy repair process. The selection circuit evaluates the operational status of available repair circuits and pre-determines the optimal repair path, ensuring that only functional repair circuits are selected. This preliminary action prevents time-consuming trial-and-error repair attempts while maintaining high repair effectiveness.
Solution Approach 2:
The patent establishes a feedback mechanism where the selection circuit continuously monitors the status of repair circuits and wiring paths, using this information to make informed selection decisions. This feedback loop ensures that the system only selects repair paths that are currently functional, thereby maintaining high reliability while minimizing unnecessary repair attempts and associated time losses.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes: a memory cell array including a plurality of memories arranged on a plurality of rows and a plurality of columns, each of the memories being a volatile memory; a plurality of repair circuits configured to repair the memory cell array; a selection circuit configured to select, from the plurality of repair circuits, a repair circuit to be connected to a memory included in the plurality of memories; and a holding circuit configured to hold selection information for selecting, by the selection circuit, a designated repair circuit out of the plurality of repair circuits, and control the selection circuit based on the selection information. The selection circuit is configured to be able to select at least two repair circuits in parallel out of the plurality of repair circuits.